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Difference between revisions of "amd/duron/dhd900amt1b"
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{{amd title|Duron 900 (Morgan)}}
 
{{amd title|Duron 900 (Morgan)}}
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{{mpu
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{{chip
 
| name                = Duron 900
 
| name                = Duron 900
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Duron 900
 
| model number        = Duron 900
 
| part number        = DHD900AMT1B
 
| part number        = DHD900AMT1B
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = April 2, 2001
 
| first announced    = April 2, 2001
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 1.75 V
 
| v core              = 1.75 V
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| socket 0 type      = PGA-462
 
| socket 0 type      = PGA-462
 
}}
 
}}
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The '''Duron 900''' based on the Morgan core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 42.7 W with a typical TDP of 39.2 W.
+
The '''Duron 900''' based on the {{amd|Morgan|l=core}} core was a {{arch|32}} [[x86]] [[microprocessor]] developed by [[AMD]] and introduced in early 2001. This model was part of the second generation of the {{amd|Duron}} family. Designed based on AMD's {{amd|microarchitecture/k7|K7}} (a {{amd|Thunderbird}}-derivative) on a [[180 nm process]], this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 42.7 W and a typical TDP of 39.2 W.
 +
 
 +
== Cache ==
 +
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
 +
{{cache info
 +
|l1i cache=64 KiB
 +
|l1i break=1x64 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=64 KiB
 +
|l1d break=1x64 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=64 KiB
 +
|l2 break=1x64 KiB
 +
|l2 desc=16-way set associative
 +
|l2 extra=
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 
 +
== Features ==
 +
{{x86 features
 +
| em64t      =
 +
| nx          =
 +
| txt        =
 +
| tsx        =
 +
| vpro        =
 +
| ht          =
 +
| tbt1        =
 +
| tbt2        =
 +
| bpt        =
 +
| vt-x        =
 +
| vt-d        =
 +
| ept        =
 +
| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| sse        =
 +
| sse2        =
 +
| sse3        =
 +
| ssse3      =
 +
| sse4        =
 +
| sse4.1      =
 +
| sse4.2      =
 +
| aes        =
 +
| pclmul      =
 +
| avx        =
 +
| avx2        =
 +
| bmi        =
 +
| bmi1        =
 +
| bmi2        =
 +
| f16c        =
 +
| fma3        =
 +
| mpx        =
 +
| sgx        =
 +
| eist        =
 +
}}
 +
* [[has feature::Halt State]]
 +
* [[has feature::Sleep State]]
 +
== Documents ==
 +
=== DataSheet ===
 +
* [[:File:AMD Duron Processor Model 7 Data Sheet (January, 2002).pdf|AMD Duron Processor Model 7 Data Sheet]]; Publication # 24310; Rev: G; Issue Date: January 2002.
 +
=== Other ===
 +
* [[:File:AMD Duron Processor Model 7 Revision Guid (October, 2003).pdf|AMD Duron Processor Model 7 Revision Guide]]; Publication # 24806; Rev: E; Issue Date: October 2003.
 +
 
 +
== See also ==
 +
* {{amd|Duron}}
 +
* {{intel|Celeron}}

Latest revision as of 15:07, 13 December 2017

Edit Values
Duron 900
General Info
DesignerAMD
ManufacturerAMD
Model NumberDuron 900
Part NumberDHD900AMT1B
MarketDesktop
IntroductionApril 2, 2001 (announced)
April 2, 2001 (launched)
ShopAmazon
General Specs
FamilyDuron
SeriesDuron Desktop
LockedYes
Frequency900 MHz
Bus typeFSB
Bus speed100 MHz
Bus rate200 MT/s
Clock multiplier9
CPUID670
Microarchitecture
MicroarchitectureK7
Core NameMorgan
Core Family6
Core Model7
Core Stepping0
Process180 nm
Transistors25,180,000
TechnologyCMOS
Die105.68 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore1.75 V ± 0.15 V
TDP42.7 W
Tcase0 °C – 90 °C
Tstorage-40 °C – 100 °C

The Duron 900 based on the Morgan core was a 32-bit x86 microprocessor developed by AMD and introduced in early 2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 (a Thunderbird-derivative) on a 180 nm process, this MPU operated at 900 MHz with a bus capable of 200 MT/s with a max TDP of 42.7 W and a typical TDP of 39.2 W.

Cache[edit]

Main article: K7 § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L1D$ 64 KiB
65,536 B
0.0625 MiB
1x64 KiB 2-way set associative
L2$ 64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB 16-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Halt State
  • Sleep State

Documents[edit]

DataSheet[edit]

Other[edit]

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=amd/duron/dhd900amt1b&oldid=69963"
Facts about "Duron 900 (Morgan) - AMD"
RDF feed
has featureHalt State + and Sleep State +
l1d$ description2-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +