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Difference between revisions of "intel/xeon d/d-1559"
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{{intel title|Xeon D-1559}} | {{intel title|Xeon D-1559}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Xeon D-1559 |
− | | image | + | |image=broadwell de (front).png |
− | | image | + | |back image=broadwell de (back).png |
− | | | + | |designer=Intel |
− | + | |manufacturer=Intel | |
− | | manufacturer | + | |model number=D-1559 |
− | | model number | + | |part number=GG8067402570801 |
− | | part number | + | |s-spec=SR2M5 |
− | | market | + | |market=Server |
− | | market 2 | + | |market 2=Embedded |
− | | first announced | + | |first announced=April, 2016 |
− | | first launched | + | |first launched=April, 2016 |
− | | | + | |release price (tray)=$727.00 |
− | | | + | |family=Xeon D |
+ | |series=D-1500 | ||
+ | |locked=Yes | ||
+ | |frequency=1,500 MHz | ||
+ | |turbo frequency1=2,100 MHz | ||
+ | |bus type=DMI 2.0 | ||
+ | |clock multiplier=15 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Broadwell | ||
+ | |platform=Grangeville | ||
+ | |core name=Broadwell DE | ||
+ | |core family=6 | ||
+ | |core model=6 | ||
+ | |core stepping=Y0 | ||
+ | |process=14 nm | ||
+ | |transistors=4,700,000,000 | ||
+ | |technology=CMOS | ||
+ | |die area=306.18 mm² | ||
+ | |word size=64 bit | ||
+ | |core count=12 | ||
+ | |thread count=24 | ||
+ | |max cpus=1 | ||
+ | |max memory=128 GiB | ||
+ | |tdp=45 W | ||
+ | |temp min=-40 °C | ||
+ | |temp max=85 °C | ||
+ | |package name 1=intel,fcbga_1667 | ||
+ | }} | ||
+ | '''Xeon D-1559''' is a {{arch|64}} [[dodeca-core]] [[x86]] microserver SoC introduced by [[Intel]] in mid [[2016]]. The D-1559 is based on the {{intel|Broadwell|l=arch}} microarchitecture and is fabricated on their [[14 nm process]]. It operates at 1.5 GHz with a TDP of 45 W and a {{intel|turbo boost|turbo frequency}} of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory. | ||
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== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}} | + | {{main|intel/microarchitectures/broadwell (server)#Memory_Hierarchy|l1=Broadwell § Cache}} |
− | {{cache | + | {{cache size |
− | |l1i cache=384 | + | |l1 cache=768 KiB |
− | |l1i break=12x32 | + | |l1i cache=384 KiB |
+ | |l1i break=12x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | + | |l1d cache=384 KiB | |
− | |l1d cache=384 | + | |l1d break=12x32 KiB |
− | |l1d break=12x32 | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
− | |l2 cache=3 | + | |l2 cache=3 MiB |
− | |l2 break=12x256 | + | |l2 break=12x256 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
|l3 cache=18 MiB | |l3 cache=18 MiB | ||
− | |l3 break= | + | |l3 break=12x1.5 MiB |
− | |l3 | + | |l3 desc=16-way set associative |
+ | |l3 policy=write-back | ||
}} | }} | ||
Line 90: | Line 71: | ||
== Memory controller == | == Memory controller == | ||
− | {{ | + | {{memory controller |
− | | type | + | |type=DDR4-2133 |
− | + | |ecc=Yes | |
− | + | |max mem=128 GiB | |
− | | | + | |controllers=1 |
− | | | + | |channels=2 |
− | | controllers | + | |max bandwidth=31.78 GiB/s |
− | | channels | + | |bandwidth schan=15.89 GiB/s |
− | + | |bandwidth dchan=31.78 GiB/s | |
− | | max bandwidth | ||
− | | bandwidth schan | ||
− | | bandwidth dchan | ||
− | |||
}} | }} | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions main |
− | | | + | | |
− | | pcie revision | + | {{expansions entry |
− | | pcie lanes | + | |type=PCIe |
− | | pcie | + | |pcie revision=3.0 |
− | | pcie config | + | |pcie lanes=24 |
− | | pcie config | + | |pcie config=x16 |
− | | pcie config 2 | + | |pcie config 2=x8 |
− | | usb revision | + | |pcie config 3=x4 |
− | | usb revision 2 | + | }} |
− | | usb ports | + | {{expansions entry |
− | | | + | |type=PCIe |
− | | | + | |pcie revision=2.0 |
− | | | + | |pcie lanes=8 |
− | + | |pcie config=x8 | |
+ | |pcie config 2=x4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=3.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=2.0 | ||
+ | |usb ports=4 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=SATA | ||
+ | |sata revision=3 | ||
+ | |sata ports=6 | ||
+ | }} | ||
}} | }} | ||
== Networking == | == Networking == | ||
− | {{ | + | {{network |
− | | | + | |eth opts=Yes |
− | | | + | |10ge=Yes |
− | | | + | |10ge ports=2 |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
}} | }} | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=Yes |
− | | sse | + | |sse=Yes |
− | | sse2 | + | |sse2=Yes |
− | | sse3 | + | |sse3=Yes |
− | | ssse3 | + | |ssse3=Yes |
− | | | + | |sse41=Yes |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=No |
− | | aes | + | |avx=Yes |
− | | | + | |avx2=Yes |
− | | | + | |avx512f=No |
− | | | + | |avx512cd=No |
− | | | + | |avx512er=No |
− | | | + | |avx512pf=No |
− | | | + | |avx512bw=No |
− | | | + | |avx512dq=No |
− | | sgx | + | |avx512vl=No |
− | | | + | |avx512ifma=No |
− | | secure key | + | |avx512vbmi=No |
− | | os guard | + | |avx5124fmaps=No |
+ | |avx512vnni=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=Yes | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |intqat=No | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | |em64t=Yes | ||
+ | |vt-x=Yes | ||
+ | |vt-d=Yes | ||
+ | |sse4=Yes | ||
+ | |sse4_1=Yes | ||
+ | |sse4_2=Yes | ||
+ | |bmi=Yes | ||
+ | |secure key=Yes | ||
+ | |os guard=Yes | ||
}} | }} |
Latest revision as of 02:16, 1 April 2019
Edit Values | |
Xeon D-1559 | |
![]() | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | D-1559 |
Part Number | GG8067402570801 |
S-Spec | SR2M5 |
Market | Server, Embedded |
Introduction | April, 2016 (announced) April, 2016 (launched) |
Release Price | $727.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon D |
Series | D-1500 |
Locked | Yes |
Frequency | 1,500 MHz |
Turbo Frequency | 2,100 MHz (1 core) |
Bus type | DMI 2.0 |
Clock multiplier | 15 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Broadwell |
Platform | Grangeville |
Core Name | Broadwell DE |
Core Family | 6 |
Core Model | 6 |
Core Stepping | Y0 |
Process | 14 nm |
Transistors | 4,700,000,000 |
Technology | CMOS |
Die | 306.18 mm² |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 128 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 45 W |
OP Temperature | -40 °C – 85 °C |
Packaging | |
Package | FCBGA-1667 (FCBGA) |
Dimension | 37.5 mm × 37.5 mm × 3.557 mm |
Pitch | 0.7 mm |
Contacts | 1667 |
![]() |
Xeon D-1559 is a 64-bit dodeca-core x86 microserver SoC introduced by Intel in mid 2016. The D-1559 is based on the Broadwell microarchitecture and is fabricated on their 14 nm process. It operates at 1.5 GHz with a TDP of 45 W and a turbo frequency of 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
Cache[edit]
- Main article: Broadwell § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics[edit]
This SoC has no integrated graphics processing unit.
Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Networking[edit]
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Networking
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon D-1559 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1559 - Intel#pcie + |
back image | ![]() |
base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
bus type | DMI 2.0 + |
clock multiplier | 15 + |
core count | 12 + |
core family | 6 + |
core model | 6 + |
core name | Broadwell DE + |
core stepping | Y0 + |
designer | Intel + |
die area | 306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) + |
family | Xeon D + |
first announced | April 2016 + |
first launched | April 2016 + |
full page name | intel/xeon d/d-1559 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Secure Key Technology + and OS Guard + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
ldate | April 2016 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max memory bandwidth | 31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max operating temperature | 85 °C + |
max sata ports | 6 + |
max usb ports | 4 + |
microarchitecture | Broadwell + |
min operating temperature | -40 °C + |
model number | D-1559 + |
name | Xeon D-1559 + |
package | FCBGA-1667 + |
part number | GG8067402570801 + |
platform | Grangeville + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) + |
release price (tray) | $ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) + |
s-spec | SR2M5 + |
series | D-1500 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 + |
tdp | 45 W (45,000 mW, 0.0603 hp, 0.045 kW) + |
technology | CMOS + |
thread count | 24 + |
transistor count | 4,700,000,000 + |
turbo frequency (1 core) | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |