From WikiChip
Difference between revisions of "kibibyte"

 
(2 intermediate revisions by the same user not shown)
Line 1: Line 1:
{{title|Kibibyte (KiB)}}
+
{{title|Kibibyte (KiB)}}{{units of digital info|Kibibyte|2<sup>10</sup> Bytes<br>1024 Bytes}}
 
A '''kibibyte''' ('''KiB'''), derived from ''[[wikipedia:kilo-|kilo]]-[[binary]]-byte'', is a unit of digital information storage equal to 1024 [[bytes]]. This is in contrast to a [[kilobyte]], meaning 1000 bytes. The unit was established by the [[International Electrotechnical Commission]] in [[1998]] to differentiate units in base 10 from units in base 2. IEC formally added it to {{iec|60027-2|IEC 60027-2}} which was later superseded by {{iec|80000-13|IEC 80000-13}}.
 
A '''kibibyte''' ('''KiB'''), derived from ''[[wikipedia:kilo-|kilo]]-[[binary]]-byte'', is a unit of digital information storage equal to 1024 [[bytes]]. This is in contrast to a [[kilobyte]], meaning 1000 bytes. The unit was established by the [[International Electrotechnical Commission]] in [[1998]] to differentiate units in base 10 from units in base 2. IEC formally added it to {{iec|60027-2|IEC 60027-2}} which was later superseded by {{iec|80000-13|IEC 80000-13}}.
  
  
:<math>1 \text{ KiB} = 2^{10} \text{ bytes} = 1024 \text{ bytes} = 8192 \text{ bits}</math>
+
:<math>1 \text{ KiB} = 2^{10} \text{ bytes} = 1\,024 \text{ bytes} = 8\,192 \text{ bits}</math>
 
 
 
 
  
  
Line 11: Line 9:
 
* A typical [[L1I$]] and [[L1D$]] is between 8 and 64 KiB. For example, [[AMD]]'s {{amd|K5|l=arch}} had 16 KiB L1 instruction cache and 8 KiB data cache.
 
* A typical [[L1I$]] and [[L1D$]] is between 8 and 64 KiB. For example, [[AMD]]'s {{amd|K5|l=arch}} had 16 KiB L1 instruction cache and 8 KiB data cache.
 
* A typical [[L2$]] is between 64 and 512 KiB. For example [[Intel]]'s {{intel|Haswell|l=arch}} had 256 KiB of L2 cache.
 
* A typical [[L2$]] is between 64 and 512 KiB. For example [[Intel]]'s {{intel|Haswell|l=arch}} had 256 KiB of L2 cache.
* A 16-bit CPU cannot directly address more than 64 KiB.
+
* A 16-bit [[CPU]] cannot directly address more than 64 KiB.

Latest revision as of 01:27, 19 September 2016

Unit of Digital Information Storage
Kibibyte 210 Bytes
1024 Bytes
SI IEC
Decimal Binary
kilobyte kB 103
megabyte MB 106
gigabyte GB 109
terabyte TB 1012
petabyte PB 1015
exabyte EB 1018
zettabyte ZB 1021
yottabyte YB 1024
kibibyte KiB 210
mebibyte MiB 220
gibibyte GiB 230
tebibyte TiB 240
pebibyte PiB 250
exbibyte EiB 260
zebibyte ZiB 270
yobibyte YiB 280
(larger units were proposed but have not yet formally been adopted by the BIPM)

A kibibyte (KiB), derived from kilo-binary-byte, is a unit of digital information storage equal to 1024 bytes. This is in contrast to a kilobyte, meaning 1000 bytes. The unit was established by the International Electrotechnical Commission in 1998 to differentiate units in base 10 from units in base 2. IEC formally added it to IEC 60027-2 which was later superseded by IEC 80000-13.


Equation 1 KiB equals 2 Superscript 10 Baseline bytes equals 1 024 bytes equals 8 192 bits


Examples[edit]

  • A typical L1I$ and L1D$ is between 8 and 64 KiB. For example, AMD's K5 had 16 KiB L1 instruction cache and 8 KiB data cache.
  • A typical L2$ is between 64 and 512 KiB. For example Intel's Haswell had 256 KiB of L2 cache.
  • A 16-bit CPU cannot directly address more than 64 KiB.