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Difference between revisions of "intel/microarchitectures/modified pentium m"
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{{intel title|Modified Pentium M|arch}} | {{intel title|Modified Pentium M|arch}} | ||
{{microarchitecture | {{microarchitecture | ||
| + | | atype = CPU | ||
| name = Modified Pentium M | | name = Modified Pentium M | ||
| designer = Intel | | designer = Intel | ||
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| phase-out = 2008 | | phase-out = 2008 | ||
| process = 65 nm | | process = 65 nm | ||
| + | |isa=x86-16 | ||
| + | |isa 2=x86-32 | ||
| succession = Yes | | succession = Yes | ||
Latest revision as of 18:26, 30 November 2017
| Edit Values | |
| Modified Pentium M µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2006 |
| Phase-out | 2008 |
| Process | 65 nm |
| Instructions | |
| ISA | x86-16, x86-32 |
| Succession | |
Modified Pentium M (though no official name was ever given by Intel) was the microarchitecture for Intel's Yonah core-based microprocessors. This miroarchitecture was a modified version of the original Pentium M microarchitecture.