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Difference between revisions of "amd/k6-iii+/amd-k6-iiie+-500acr"
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{{amd title|AMD-K6-IIIE+/500ACR}}
 
{{amd title|AMD-K6-IIIE+/500ACR}}
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{{mpu
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{{chip
 
| name                = AMD-K6-IIIE+/500ACR
 
| name                = AMD-K6-IIIE+/500ACR
 
| no image            = Yes
 
| no image            = Yes
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| model number        = AMD-K6-IIIE+/500ACR
 
| model number        = AMD-K6-IIIE+/500ACR
 
| part number        = AMD-K6-IIIE+/500ACR
 
| part number        = AMD-K6-IIIE+/500ACR
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Embedded
 
| market              = Embedded
 
| first announced    = September 25, 2000
 
| first announced    = September 25, 2000
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
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| max memory          = 4 GB
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| max memory          = 4 GiB
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| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 2.0 V
 
| v core              = 2.0 V
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}}
 
}}
 
'''AMD-K6-IIIE+/500ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.
 
'''AMD-K6-IIIE+/500ACR''' is a {{arch|32}} [[x86]] embedded microprocessor designed by [[AMD]] and introduced in late [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.
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 +
== Cache ==
 +
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
 +
[[L3$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
 +
{{cache info
 +
|l1i cache=32 KiB
 +
|l1i break=1x32 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=32 KiB
 +
|l1d break=1x32 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=256 KiB
 +
|l2 break=1x256 KiB
 +
|l2 desc=4-way set associative
 +
|l2 extra=(shared)
 +
|l3 cache=
 +
|l3 break=
 +
|l3 desc=
 +
|l3 extra=
 +
}}
 +
 +
== Graphics ==
 +
This processors has no integrated graphics processing unit.
 +
 +
== Features ==
 +
{{x86 features
 +
| mmx        = Yes
 +
| emmx        = Yes
 +
| 3dnow      = Yes
 +
| e3dnow      = Yes
 +
| pownow      = Yes
 +
}}
 +
* Auto-power down state
 +
* Stop clock state
 +
* Halt state

Latest revision as of 15:09, 13 December 2017

Edit Values
AMD-K6-IIIE+/500ACR
General Info
DesignerAMD
ManufacturerAMD
Model NumberAMD-K6-IIIE+/500ACR
Part NumberAMD-K6-IIIE+/500ACR
MarketEmbedded
IntroductionSeptember 25, 2000 (announced)
September 25, 2000 (launched)
ShopAmazon
General Specs
FamilyK6-III+
SeriesK6-III+ Embedded
Frequency499.99 MHz
Bus typeFSB
Bus speed99.99 MHz
Bus rate99.99 MT/s
Clock multiplier5
CPUID5D0
Microarchitecture
MicroarchitectureK6-III
PlatformSuper 7
Core Family5
Core Model13
Core Stepping0, 1, 2, 3
Process0.18 µm
Transistors21,400,000
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore2.0 V ± 0.1 V
VI/O3.3675 V ± 7%
TDP14.5 W
Tcase0 °C – 70 °C
Tstorage-65 °C – 150 °C

AMD-K6-IIIE+/500ACR is a 32-bit x86 embedded microprocessor designed by AMD and introduced in late 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5. This chip had a TDP of 14.5 W.

Cache[edit]

Main article: K6-III § Cache

L3$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 4-way set associative (shared)

Graphics[edit]

This processors has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Auto-power down state
  • Stop clock state
  • Halt state
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/k6-iii%2B/amd-k6-iiie%2B-500acr&oldid=70089"
Facts about "AMD-K6-IIIE+/500ACR - AMD"
RDF feed
base frequency499.99 MHz (0.5 GHz, 499,990 kHz) +
bus rate99.99 MT/s (0.1 GT/s, 99,990 kT/s) +
bus speed99.99 MHz (0.1 GHz, 99,990 kHz) +
bus typeFSB +
clock multiplier5 +
core count1 +
core family5 +
core model13 +
core stepping0 +, 1 +, 2 + and 3 +
core voltage2 V (20 dV, 200 cV, 2,000 mV) +
core voltage tolerance0.1 V +
cpuid5D0 +
designerAMD +
familyK6-III+ +
first announcedSeptember 25, 2000 +
first launchedSeptember 25, 2000 +
full page nameamd/k6-iii+/amd-k6-iiie+-500acr +
instance ofmicroprocessor +
io voltage3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) +
io voltage tolerance7% +
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
l2$ description4-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateSeptember 25, 2000 +
manufacturerAMD +
market segmentEmbedded +
max case temperature343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature423.15 K (150 °C, 302 °F, 761.67 °R) +
microarchitectureK6-III +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature208.15 K (-65 °C, -85 °F, 374.67 °R) +
model numberAMD-K6-IIIE+/500ACR +
nameAMD-K6-IIIE+/500ACR +
part numberAMD-K6-IIIE+/500ACR +
platformSuper 7 +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesK6-III+ Embedded +
smp max ways1 +
tdp14.5 W (14,500 mW, 0.0194 hp, 0.0145 kW) +
technologyCMOS +
thread count1 +
transistor count21,400,000 +
word size32 bit (4 octets, 8 nibbles) +