From WikiChip
Difference between revisions of "intel/celeron/n3350"
< intel‎ | celeron

(+gpu)
(Added missing features, as per https://valid.x86.fr/mrj60f and my own lscpu run)
 
(13 intermediate revisions by 3 users not shown)
Line 1: Line 1:
 
{{intel title|Celeron N3350}}
 
{{intel title|Celeron N3350}}
−
{{mpu
+
{{chip
 
| name                = Celeron N3350
 
| name                = Celeron N3350
 
| no image            = Yes
 
| no image            = Yes
Line 6: Line 6:
 
| manufacturer        = Intel
 
| manufacturer        = Intel
 
| model number        = N3350
 
| model number        = N3350
−
| part number        =  
+
| part number        = FH8066802980002
−
| part number 1      =
+
| part number 2      = FH8066802980002
−
| part number 2      =  
 
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = August 30, 2016
 
| first announced    = August 30, 2016
Line 15: Line 15:
 
| last order          =  
 
| last order          =  
 
| last shipment      =  
 
| last shipment      =  
 +
| release price      = $107.00
  
 
| family              = Celeron
 
| family              = Celeron
Line 26: Line 27:
 
| bus rate            =  
 
| bus rate            =  
 
| clock multiplier    = 11
 
| clock multiplier    = 11
−
| s-spec              =  
+
| s-spec              = SR2YB
−
| s-spec 2            =  
+
| s-spec 2            = SR2Z7
 
| s-spec es          =  
 
| s-spec es          =  
 
| s-spec qs          =  
 
| s-spec qs          =  
 
| cpuid              =  
 
| cpuid              =  
  
 +
| isa family          = x86
 +
| isa                = x86-64
 
| microarch          = Goldmont
 
| microarch          = Goldmont
 
| platform            =  
 
| platform            =  
 
| core name          = Apollo Lake
 
| core name          = Apollo Lake
−
| core stepping      =  
+
| core stepping      = B0
 +
| core stepping 2    = B1
 
| process            = 14 nm
 
| process            = 14 nm
 
| transistors        =  
 
| transistors        =  
Line 44: Line 48:
 
| thread count        = 2
 
| thread count        = 2
 
| max cpus            = 1
 
| max cpus            = 1
−
| max memory          = 8 GB
+
| max memory          = 8 GiB
 +
 
  
−
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              =  
 
| v core              =  
Line 58: Line 62:
 
| ctdp up            =  
 
| ctdp up            =  
 
| ctdp up frequency  =  
 
| ctdp up frequency  =  
−
| temp min            =
 
−
| temp max            =
 
 
| tjunc min          = 0 °C
 
| tjunc min          = 0 °C
 
| tjunc max          = 105 °C
 
| tjunc max          = 105 °C
 
| tcase min          =  
 
| tcase min          =  
 
| tcase max          =  
 
| tcase max          =  
−
| tstorage min        =  
+
| tstorage min        = -25 °C
−
| tstorage max        =  
+
| tstorage max        = 125 °C
  
 
| packaging          = Yes
 
| packaging          = Yes
Line 81: Line 83:
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont's Cache}}
+
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
 
{{cache info
 
{{cache info
−
|l1i cache=64 KB
+
|l1i cache=64 KiB
−
|l1i break=2x32 KB
+
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
 
|l1i extra=(per core)
 
|l1i extra=(per core)
−
|l1d cache=48 KB
+
|l1d cache=48 KiB
−
|l1d break=4x24 KB
+
|l1d break=4x24 KiB
 
|l1d desc=6-way set associative
 
|l1d desc=6-way set associative
 
|l1d extra=(per core)
 
|l1d extra=(per core)
−
|l2 cache=1 MB
+
|l2 cache=1 MiB
−
|l2 break=1x1 MB
+
|l2 break=1x1 MiB
 
|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
 
|l2 extra=(per 2 cores)
 
|l2 extra=(per 2 cores)
−
|l3 cache=0 KB
+
|l3 cache=0 KiB
 
|l3 desc=No L3$
 
|l3 desc=No L3$
 
}}
 
}}
Line 126: Line 128:
 
| frequency          = 200 MHz
 
| frequency          = 200 MHz
 
| max frequency      = 650 MHz
 
| max frequency      = 650 MHz
−
| max memory          = 8 GB
+
| max memory          = 8 GiB
  
 
| output crt          =  
 
| output crt          =  
Line 171: Line 173:
 
* Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
 
* Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
 
* Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.
 
* Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 2.0
 +
| pcie lanes        = 6
 +
| pcie config        = 4x1
 +
| pcie config 1      = 1x4 + 1x2
 +
| pcie config 2      = 2x1 + 1x2 + 1x2
 +
| usb revision      = 2.0
 +
| usb revision 2    = 3.0
 +
| usb ports          = 8
 +
| sata revision      = 3.0
 +
| sata ports        = 3
 +
| integrated lan    =
 +
| uart              = Yes
 +
| gp io              = Yes
 +
}}
 +
 +
* 2x USB 2.0 ports
 +
* 6x USB 3.0 ports
 +
** 1x USB Dual Role
 +
** 1x Dedicated Port
 +
** 3x multiplexed with PCIe 2.0
 +
** 1x multiplexed with SATA 3.0
 +
 +
== Features ==
 +
{{x86 features
 +
|real=No
 +
|protected=No
 +
|smm=No
 +
|fpu=No
 +
|x8616=No
 +
|x8632=No
 +
|x8664=No
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=No
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|sse_gfni=No
 +
|avx=No
 +
|avx_gfni=No
 +
|avx2=No
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx512vnni=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|avx512gfni=No
 +
|avx512vaes=No
 +
|avx512vbmi2=No
 +
|avx512bitalg=No
 +
|avx512vpclmulqdq=No
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=No
 +
|sha=Yes
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|bfloat16=No
 +
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|tvb=No
 +
|bpt=Yes
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|tme=No
 +
|mktme=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=Yes
 +
|ht=No
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=No
 +
|ept=Yes
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|intqat=No
 +
|dlboost=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
|xfr2=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=No
 +
|amdpbod=No
 +
|em64t=Yes
 +
|vt-x=Yes
 +
|vt-d=Yes
 +
|sse4_1=Yes
 +
|sse4_2=Yes
 +
|pclmul=Yes
 +
|secure key=Yes
 +
}}

Latest revision as of 19:58, 21 October 2023

Edit Values
Celeron N3350
General Info
DesignerIntel
ManufacturerIntel
Model NumberN3350
Part NumberFH8066802980002,
FH8066802980002
S-SpecSR2YB, SR2Z7
MarketMobile
IntroductionAugust 30, 2016 (announced)
August 30, 2016 (launched)
Release Price$107.00
ShopAmazon
General Specs
FamilyCeleron
SeriesN Series
LockedYes
Frequency1100 MHz
Turbo FrequencyYes
Turbo Frequency2400 MHz (1 core)
Clock multiplier11
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureGoldmont
Core NameApollo Lake
Core SteppingB0, B1
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads2
Max Memory8 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
SDP4 W
TDP6 W
Tjunction0 °C – 105 °C
Tstorage-25 °C – 125 °C

Celeron N3350 is a dual-core 64-bit x86 mobile microprocessor introduced by Intel in 2016. The processor is based on Goldmont microarchitecture and is manufactured on a 14 nm process. The chip operates at 1.1 GHz with burst frequency of 2.4 GHz and has a TDP of 6 W (SDP of 4 W). This MPU incorporates Intel's HD Graphics 500 GPU operating at 200 MHz with a burst frequency of 650 MHz.

Cache[edit]

Main article: Goldmont § Cache
Cache Info [Edit Values]
L1I$ 64 KiB
65,536 B
0.0625 MiB
2x32 KiB 8-way set associative (per core)
L1D$ 48 KiB
49,152 B
0.0469 MiB
4x24 KiB 6-way set associative (per core)
L2$ 1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
1x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller[edit]

Integrated Memory Controller
Type LPDDR3-1333, LPDDR3-1600, LPDDR3-2400, DDR3L-1333, DDR3L-1600, DDR3L-1867, LPDDR4-1600, LPDDR4-2133, LPDDR4-2400
Controllers 1
Channels 2
ECC Support No
Bandwidth (single) 19,200 MB/s
Bandwidth (dual) 38,400 MB/s
Max memory 8,192 MB

Graphics[edit]

Integrated Graphic Information
GPU HD Graphics 500
Device ID 0x5A85
Execution Units 12
Displays 3
Frequency 200 MHz
0.2 GHz
200,000 KHz
Max frequency 650 MHz
0.65 GHz
650,000 KHz
Max memory 8 GiB
8,192 MiB
8,388,608 KiB
8,589,934,592 B
Output DisplayPort, Embedded DisplayPort, HDMI, DSI
DirectX 12
OpenGL 4.3
OpenCL 1.2
OpenGL ES 3.0
HDMI 1.4b
DP 1.2
eDP 1.3
Max HDMI Res 3840x2160 @30 Hz
Max DSI Res 2560x1600 @60 Hz
Max DP Res 4096x2160 @60 Hz
Max eDP Res 3840x2160 @60 Hz
Intel Quick Sync Video
Intel Clear Video
  • Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
  • Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes6
Configs4x1, 2x1 + 1x2 + 1x2
USB
Revision2.0, 3.0
Ports8
UART
SATA
Revision3.0
Ports3
GP I/OYes


  • 2x USB 2.0 ports
  • 6x USB 3.0 ports
    • 1x USB Dual Role
    • 1x Dedicated Port
    • 3x multiplexed with PCIe 2.0
    • 1x multiplexed with SATA 3.0

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AESAES Encryption Instructions
SHASHA Extensions
NXNo-eXecute
BPTBurst Performance Technology
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
VT-xVT-x (Virtualization)
EPTExtended Page Tables (SLAT)
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/n3350&oldid=101950"
Facts about "Celeron N3350 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron N3350 - Intel#io +
base frequency1,100 MHz (1.1 GHz, 1,100,000 kHz) +
clock multiplier11 +
core count2 +
core nameApollo Lake +
core steppingB0 + and B1 +
designerIntel +
device id0x5A85 +
familyCeleron +
first announcedAugust 30, 2016 +
first launchedAugust 30, 2016 +
full page nameintel/celeron/n3350 +
has extended page tables supporttrue +
has featureintegrated gpu +, Advanced Encryption Standard Instruction Set Extension +, Burst Performance Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x + and Extended Page Tables +
has intel burst performance technologytrue +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 500 +
integrated gpu base frequency200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
isax86-64 +
isa familyx86 +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +
ldateAugust 30, 2016 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max pcie lanes6 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureGoldmont +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberN3350 +
nameCeleron N3350 +
part numberFH8066802980002 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-specSR2YB + and SR2Z7 +
sdp4 W (4,000 mW, 0.00536 hp, 0.004 kW) +
seriesN Series +
smp max ways1 +
tdp6 W (6,000 mW, 0.00805 hp, 0.006 kW) +
technologyCMOS +
thread count2 +
turbo frequency (1 core)2,400 MHz (2.4 GHz, 2,400,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +