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Difference between revisions of "amd/k6-2/k6-2e-333afr"
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− | {{amd title|K6-2E-333AFR}} | + | {{amd title|K6-2E/333AFR}} |
+ | {{chip | ||
+ | | name = K6-2E/333AFR | ||
+ | | no image = No | ||
+ | | image = | ||
+ | | image size = | ||
+ | | caption = | ||
+ | | designer = AMD | ||
+ | | manufacturer = AMD | ||
+ | | model number = K6-2E/333AFR | ||
+ | | part number = AMD-K6-2E/333AFR | ||
+ | | part number 2 = | ||
+ | | part number 3 = | ||
+ | | part number 4 = | ||
+ | | market = Embedded | ||
+ | | first announced = November, 1999 | ||
+ | | first launched = November, 1999 | ||
+ | | last order = | ||
+ | | last shipment = | ||
+ | |||
+ | | family = K6-2 | ||
+ | | series = K6-2 Desktop | ||
+ | | locked = | ||
+ | | frequency = 333.66 MHz | ||
+ | | bus type = FSB | ||
+ | | bus speed = 95.33 MHz | ||
+ | | bus rate = 95.33 MT/s | ||
+ | | clock multiplier = 3.5 | ||
+ | | cpuid = 58C | ||
+ | |||
+ | | microarch = K6-2 | ||
+ | | platform = Super 7 | ||
+ | | chipset = | ||
+ | | core name = Chomper Extended | ||
+ | | core family = 5 | ||
+ | | core model = 8 | ||
+ | | core stepping = 12 | ||
+ | | process = 0.25 µm | ||
+ | | transistors = 9,300,000 | ||
+ | | technology = CMOS | ||
+ | | die size = 81 mm² | ||
+ | | word size = 32 bit | ||
+ | | core count = 1 | ||
+ | | thread count = 1 | ||
+ | | max cpus = 1 | ||
+ | | max memory = 4 GiB | ||
+ | |||
+ | |||
+ | | power = 10 W | ||
+ | | v core = 2.2 V | ||
+ | | v core tolerance = 0.1 V | ||
+ | | v io = 3.3675 V | ||
+ | | v io tolerance = 7% | ||
+ | | sdp = | ||
+ | | tdp = | ||
+ | | temp min = | ||
+ | | temp max = | ||
+ | | tjunc min = | ||
+ | | tjunc max = | ||
+ | | tcase min = 0 °C | ||
+ | | tcase max = 70 °C | ||
+ | | tstorage min = -65 °C | ||
+ | | tstorage max = 150 °C | ||
+ | |||
+ | | packaging = Yes | ||
+ | | package 0 = CPGA-321 | ||
+ | | package 0 type = CPGA | ||
+ | | package 0 pins = 321 | ||
+ | | package 0 pitch = 1.27 mm | ||
+ | | package 0 width = 49.53 mm | ||
+ | | package 0 length = 49.53 mm | ||
+ | | package 0 height = 3.27 mm | ||
+ | | socket 0 = Super 7 | ||
+ | | socket 0 type = PGA-321 | ||
+ | | socket 0 2 = Socket 7 | ||
+ | | socket 0 2 type = PGA-321 | ||
+ | }} | ||
'''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 333 MHz and had a [[FSB]] operating at 95 MHz. | '''K6-2/337AFR''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 333 MHz and had a [[FSB]] operating at 95 MHz. | ||
== Cache == | == Cache == | ||
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | {{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | ||
− | [[L2$]] can be 512 | + | [[L2$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. |
{{cache info | {{cache info | ||
− | |l1i cache=32 | + | |l1i cache=32 KiB |
− | |l1i break=1x32 | + | |l1i break=1x32 KiB |
|l1i desc=2-way set associative | |l1i desc=2-way set associative | ||
|l1i extra= | |l1i extra= | ||
− | |l1d cache=32 | + | |l1d cache=32 KiB |
− | |l1d break=1x32 | + | |l1d break=1x32 KiB |
|l1d desc=2-way set associative | |l1d desc=2-way set associative | ||
|l1d extra= | |l1d extra= | ||
Line 28: | Line 104: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| mmx = true | | mmx = true | ||
| 3dnow = true | | 3dnow = true |
Latest revision as of 16:09, 13 December 2017
Edit Values | |
K6-2E/333AFR | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | K6-2E/333AFR |
Part Number | AMD-K6-2E/333AFR |
Market | Embedded |
Introduction | November, 1999 (announced) November, 1999 (launched) |
Shop | Amazon |
General Specs | |
Family | K6-2 |
Series | K6-2 Desktop |
Frequency | 333.66 MHz |
Bus type | FSB |
Bus speed | 95.33 MHz |
Bus rate | 95.33 MT/s |
Clock multiplier | 3.5 |
CPUID | 58C |
Microarchitecture | |
Microarchitecture | K6-2 |
Platform | Super 7 |
Core Name | Chomper Extended |
Core Family | 5 |
Core Model | 8 |
Core Stepping | 12 |
Process | 0.25 µm |
Transistors | 9,300,000 |
Technology | CMOS |
Die | 81 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 10 W |
Vcore | 2.2 V ± 0.1 V |
VI/O | 3.3675 V ± 7% |
Tcase | 0 °C – 70 °C |
Tstorage | -65 °C – 150 °C |
K6-2/337AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 333 MHz and had a FSB operating at 95 MHz.
Contents
Cache[edit]
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
|
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- Auto-power down state
- Stop clock state
Documents[edit]
DataSheet[edit]
- AMD-K6-2E Processor Data Sheet; Publication #22529 Revision B/0, January 2000
Facts about "K6-2E/333AFR - AMD"
l1d$ description | 2-way set associative + |
l1i$ description | 2-way set associative + |