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Difference between revisions of "amd/k6-2/k6-2-300afr"
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{{amd title|K6-2/300AFR}} | {{amd title|K6-2/300AFR}} | ||
− | {{ | + | {{chip |
| name = K6-2/300AFR | | name = K6-2/300AFR | ||
| no image = | | no image = | ||
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| manufacturer = AMD | | manufacturer = AMD | ||
| model number = K6-2/300AFR | | model number = K6-2/300AFR | ||
− | | part number = K6-2/300AFR | + | | part number = AMD-K6-2/300AFR |
− | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = May 28, 1998 | | first announced = May 28, 1998 | ||
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| thread count = 1 | | thread count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
+ | |||
− | |||
| power = 17.2 W | | power = 17.2 W | ||
| v core = 2.2 V | | v core = 2.2 V | ||
Line 81: | Line 81: | ||
== Cache == | == Cache == | ||
{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | {{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}} | ||
− | [[L2$]] can be 512 | + | [[L2$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip. |
{{cache info | {{cache info | ||
− | |l1i cache=32 | + | |l1i cache=32 KiB |
− | |l1i break=1x32 | + | |l1i break=1x32 KiB |
|l1i desc=2-way set associative | |l1i desc=2-way set associative | ||
|l1i extra= | |l1i extra= | ||
− | |l1d cache=32 | + | |l1d cache=32 KiB |
− | |l1d break=1x32 | + | |l1d break=1x32 KiB |
|l1d desc=2-way set associative | |l1d desc=2-way set associative | ||
|l1d extra= | |l1d extra= | ||
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== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| mmx = true | | mmx = true | ||
| 3dnow = true | | 3dnow = true |
Latest revision as of 15:08, 13 December 2017
Edit Values | |
K6-2/300AFR | |
300AFR, Week 33, 1998 | |
General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | K6-2/300AFR |
Part Number | AMD-K6-2/300AFR |
Market | Desktop |
Introduction | May 28, 1998 (announced) June 4, 1998 (launched) |
Shop | Amazon |
General Specs | |
Family | K6-2 |
Series | K6-2 Desktop |
Frequency | 299.99 MHz |
Bus type | FSB |
Bus speed | 99.99 MHz |
Bus rate | 99.99 MT/s |
Clock multiplier | 3 |
CPUID | 580, 58C |
Microarchitecture | |
Microarchitecture | K6-2 |
Platform | Super 7 |
Core Name | Chomper |
Core Family | 5 |
Core Model | 8 |
Core Stepping | 0 |
Process | 0.25 µm |
Transistors | 9,300,000 |
Technology | CMOS |
Die | 81 mm² |
Word Size | 32 bit |
Cores | 1 |
Threads | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 17.2 W |
Vcore | 2.2 V ± 0.1 V |
VI/O | 3.3675 V ± 7% |
Tcase | 0 °C – 70 °C |
Tstorage | -65 °C – 150 °C |
K6-2/300AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1998 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 300 MHz with a FSB of 100 MHz consumed 17.2 W. Note that K6-2/300AFR-66 is an identical model with a multiplier of 4.5 instead of 3 designed to support a 66 MHz bus instead.
Cache[edit]
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics[edit]
This SoC has no integrated graphics processing unit.
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Auto-power down state
- Stop clock state
Gallery[edit]
Documents[edit]
DataSheet[edit]
- AMD-K6-2 Processor Data Sheet; Publication #21850 Revision J/0, February 2000
Facts about "K6-2/300AFR - AMD"
base frequency | 299.99 MHz (0.3 GHz, 299,990 kHz) + |
bus rate | 99.99 MT/s (0.1 GT/s, 99,990 kT/s) + |
bus speed | 99.99 MHz (0.1 GHz, 99,990 kHz) + |
bus type | FSB + |
clock multiplier | 3 + |
core count | 1 + |
core family | 5 + |
core model | 8 + |
core name | Chomper + |
core stepping | 0 + |
core voltage | 2.2 V (22 dV, 220 cV, 2,200 mV) + |
core voltage tolerance | 0.1 V + |
cpuid | 580 + and 58C + |
designer | AMD + |
die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
family | K6-2 + |
first announced | May 28, 1998 + |
first launched | June 4, 1998 + |
full page name | amd/k6-2/k6-2-300afr + |
instance of | microprocessor + |
io voltage | 3.368 V (33.675 dV, 336.75 cV, 3,367.5 mV) + |
io voltage tolerance | 7% + |
l1d$ description | 2-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
ldate | June 4, 1998 + |
main image | + |
main image caption | 300AFR, Week 33, 1998 + |
manufacturer | AMD + |
market segment | Desktop + |
max case temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max storage temperature | 423.15 K (150 °C, 302 °F, 761.67 °R) + |
microarchitecture | K6-2 + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 208.15 K (-65 °C, -85 °F, 374.67 °R) + |
model number | K6-2/300AFR + |
name | K6-2/300AFR + |
part number | AMD-K6-2/300AFR + |
platform | Super 7 + |
power dissipation | 17.2 W (17,200 mW, 0.0231 hp, 0.0172 kW) + |
process | 250 nm (0.25 μm, 2.5e-4 mm) + |
series | K6-2 Desktop + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |
transistor count | 9,300,000 + |
word size | 32 bit (4 octets, 8 nibbles) + |