Semiconductor & Computer Engineering
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Difference between revisions of "ambric/am2000/am2035"
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Latest revision as of 14:16, 13 December 2017
| Edit Values | |
| Am2035 | |
| General Info | |
| Designer | Ambric |
| Model Number | Am2035 |
| Part Number | Am2035 |
| Market | Embedded |
| Introduction | October 10, 2006 (announced) January 2007 (launched) |
| End-of-life | 2012 (last order) 2012 (last shipment) |
| General Specs | |
| Family | Am2000 |
| Series | Gen 1 |
| Locked | No |
| Frequency | 333 MHz |
| Bus speed | 100 MHz |
| Clock multiplier | 3.3 |
| Microarchitecture | |
| Microarchitecture | Ambric |
| Process | 130 nm |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 280 |
| Max Memory | 4 GiB |
Am2035 was an MPPA introduced in late 2006 by Ambric. This model was made of 35 Brics arranged as a grid, making up a total of 280 32-bit RICS-like cores operating asynchronously at 1-333 MHz.
Architecture[edit]
- Main article: Am2000 § Architecture
The Am2035 is made of 35 homogeneous 'Brics' laid out in a grid to form 280 cores and 280 RAM units.
General layout:
- 35x Brics
Cache[edit]
The Am2035 contains 35 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 455 kB of SRAM.
Memory controller[edit]
| Integrated Memory Controller | |
| Type | DDR2-400 |
| Controllers | 2 |
| Channels | 1 |
| Max memory | 4 GiB |
Expansions[edit]
- PCIe
- JTAG
- GPIO @ 100 MHz
- serial flash