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Difference between revisions of "intel/xeon e7/e7-2830"
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{{intel title|Xeon E7-2830}}
 
{{intel title|Xeon E7-2830}}
−
{{mpu
+
{{chip
 
| name                = Xeon E7-2830
 
| name                = Xeon E7-2830
 
| no image            = Yes
 
| no image            = Yes
Line 10: Line 10:
 
| model number        = E7-2830
 
| model number        = E7-2830
 
| part number        = AT80615005787AB
 
| part number        = AT80615005787AB
−
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Server
 
| market              = Server
 
| first announced    = April 5, 2011
 
| first announced    = April 5, 2011
Line 18: Line 18:
 
| last order          = August 21, 2015
 
| last order          = August 21, 2015
 
| last shipment      = February 2, 2018
 
| last shipment      = February 2, 2018
 +
| release price      = $1779.00
  
 
| family              = Xeon E7
 
| family              = Xeon E7
Line 24: Line 25:
 
| frequency          = 2,133.33 MHz
 
| frequency          = 2,133.33 MHz
 
| turbo frequency    = Yes
 
| turbo frequency    = Yes
−
| turbo frequency1    =  
+
| turbo frequency1    = 2,399.99 MHz
 
| turbo frequency2    = 2,399.99 MHz
 
| turbo frequency2    = 2,399.99 MHz
−
| turbo frequency3    =  
+
| turbo frequency3    = 2,266.66 MHz
 
| turbo frequency4    = 2,266.66 MHz
 
| turbo frequency4    = 2,266.66 MHz
−
| turbo frequency5    =  
+
| turbo frequency5    = 2,266.66 MHz
 
| turbo frequency6    = 2,266.66 MHz
 
| turbo frequency6    = 2,266.66 MHz
−
| turbo frequency7    =  
+
| turbo frequency7    = 2,266.66 MHz
 
| turbo frequency8    = 2,266.66 MHz
 
| turbo frequency8    = 2,266.66 MHz
 
| bus type            = QPI
 
| bus type            = QPI
Line 41: Line 42:
 
| cpuid              = 206F2
 
| cpuid              = 206F2
  
 +
| isa family          = x86
 +
| isa                = x86-64
 
| microarch          = Westmere
 
| microarch          = Westmere
−
| platform            =  
+
| platform            = Boxboro
 
| chipset            = Boxboro
 
| chipset            = Boxboro
 
| core name          = Westmere EX
 
| core name          = Westmere EX
Line 56: Line 59:
 
| thread count        = 16
 
| thread count        = 16
 
| max cpus            = 2
 
| max cpus            = 2
−
| max memory          = 1,024 GB
+
| max memory          = 1 TiB
 +
 
  
−
| electrical          = Yes
 
 
| v core              = 1.35 V
 
| v core              = 1.35 V
 
| v core tolerance    =  
 
| v core tolerance    =  
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| tstorage max        = 85 °C
 
| tstorage max        = 85 °C
  
−
| packaging          = Yes
+
| package module 1    = {{packages/intel/lga-1567}}
−
| package 0          = FCLGA-8
+
}}
−
| package 0 type     = FCLGA
+
'''Xeon E7-2830''' is a {{arch|64}} octa-core [[x86]] data center microprocessor that supports up to 2 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2.13 GHz with {{intel|turbo boost technology|turbo}} frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.
−
| package 0 pins      = 1567
+
 
−
| package 0 pitch    = 1.016 mm
+
== Cache ==
−
| package 0 width    = 49.17 mm
+
{{main|intel/microarchitectures/westmere#Memory_Hierarchy|l1=Westmere § Cache}}
−
| package 0 length    = 56.47 mm
+
{{cache size
−
| package 0 height    = 4.484 mm
+
|l1 cache = 512 KiB
−
| socket 0            = LGA-1567
+
|l1i cache=256 KiB
−
| socket 0 type      = LGA
+
|l1i break=8x32 KiB
 +
|l1i desc=4-way set associative
 +
|l1i policy=write-back
 +
|l1d cache=256 KiB
 +
|l1d break=8x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=2 MiB
 +
|l2 break=8x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=24 MiB
 +
|l3 break=8x3 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 +
}}
 +
 
 +
== Graphics ==
 +
This SoC has no integrated graphics processing unit.
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3-1066
 +
|ecc=Yes
 +
|max mem=1 TiB
 +
|controllers=1
 +
|channels=4
 +
|max bandwidth=31.77 GiB/s
 +
|bandwidth schan=7.942 GiB/s
 +
|bandwidth dchan=15.88 GiB/s
 +
|bandwidth tchan=23.83 GiB/s
 +
|bandwidth qchan=31.77 GiB/s
 +
}}
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=No
 +
|avx2=No
 +
 
 +
|abm=No
 +
|tbm=No
 +
|bmi1=No
 +
|bmi2=No
 +
|fma3=No
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=No
 +
|sha=No
 +
|xop=No
 +
|adx=No
 +
|clmul=No
 +
|f16c=No
 +
|tbt1=Yes
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=No
 +
|txt=Yes
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=No
 +
|sgx=No
 +
|securekey=No
 +
|osguard=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdv=No
 +
|rvi=No
 
}}
 
}}
−
'''Xeon E7-2830''' is a {{arch|64}} [[x86]] data center microprocessor that supports up to 2 sockets. This first generation {{intel|Xeon E7}} processor, {{intel|Westmere|Westmere}}-based, operates at a base frequency of 2.13 GHz with {{intel|turbo boost technology|turob}} frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.
 

Latest revision as of 15:28, 13 December 2017

Edit Values
Xeon E7-2830
General Info
DesignerIntel
ManufacturerIntel
Model NumberE7-2830
Part NumberAT80615005787AB
S-SpecSLC3J
MarketServer
IntroductionApril 5, 2011 (announced)
April 5, 2011 (launched)
End-of-lifeAugust 21, 2015 (last order)
February 2, 2018 (last shipment)
Release Price$1779.00
ShopAmazon
General Specs
FamilyXeon E7
SeriesE7-2800
LockedYes
Frequency2,133.33 MHz
Turbo FrequencyYes
Turbo Frequency2,399.99 MHz (1 core),
2,399.99 MHz (2 cores),
2,266.66 MHz (3 cores),
2,266.66 MHz (4 cores),
2,266.66 MHz (5 cores),
2,266.66 MHz (6 cores),
2,266.66 MHz (7 cores),
2,266.66 MHz (8 cores)
Bus typeQPI
Bus rate6.40 GT/s
Clock multiplier16
CPUID206F2
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureWestmere
PlatformBoxboro
ChipsetBoxboro
Core NameWestmere EX
Core Family6
Core Model47
Core SteppingA2
Process32 nm
Transistors2,600,000,000
TechnologyCMOS
Die513 mm²
Word Size64 bit
Cores8
Threads16
Max Memory1 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
Vcore1.35 V
TDP105 W
Tcase5 °C – 64 °C
Tstorage-40 °C – 85 °C
Packaging
PackageFCLGA-8 (LGA)FCLGA-8.svg
Dimension49.1 mm x 56.4 mm x 4.2 mm
Pitch1 mm
Pin Count1567
SocketLGA-1567

Xeon E7-2830 is a 64-bit octa-core x86 data center microprocessor that supports up to 2 sockets. This first generation Xeon E7 processor, Westmere-based, operates at a base frequency of 2.13 GHz with turbo frequency of 2.4 GHz for 2 active cores. This chip has a TDP of 105 W, supporting up to 4 channels of DDR3 with support of up to 1 TB of memory.

Cache[edit]

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associativewrite-back
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB8-way set associativewrite-back
L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  8x256 KiB8-way set associativewrite-back
L3$24 MiB
24,576 KiB
25,165,824 B
0.0234 GiB
  8x3 MiB16-way set associativewrite-back

Graphics[edit]

This SoC has no integrated graphics processing unit.

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCYes
Max Mem1 TiB
Controllers1
Channels4
Max Bandwidth31.77 GiB/s
32,532.48 MiB/s
34.113 GB/s
34,112.778 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Triple 23.83 GiB/s
Quad 31.77 GiB/s

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AESAES Encryption Instructions
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 1.0Turbo Boost Technology 1.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
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l1d$ description8-way set associative +
l1i$ description4-way set associative +
l2$ description8-way set associative +
l3$ description16-way set associative +