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Difference between revisions of "amd/am486/am486dx2-80sv8b"
< amd‎ | am486

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{{amd title|Am486DX2-80SV8B}}
 
{{amd title|Am486DX2-80SV8B}}
{{mpu
+
{{chip
 
| name                = Am486DX2-80SV8B
 
| name                = Am486DX2-80SV8B
 
| no image            = Yes
 
| no image            = Yes
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| model number        = Am486DX2-80SV8B
 
| model number        = Am486DX2-80SV8B
 
| part number        = A80486DX2-80SV8B
 
| part number        = A80486DX2-80SV8B
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              =  
 
| market              =  
 
| first announced    = 1995
 
| first announced    = 1995
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| bus type            = FSB
 
| bus type            = FSB
 
| bus speed          = 40 MHz
 
| bus speed          = 40 MHz
| bus rate            =  
+
| bus rate            = 40 MT/s
 
| clock multiplier    = 2
 
| clock multiplier    = 2
 
| cpuid              =  
 
| cpuid              =  
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| thread count        =  
 
| thread count        =  
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 4 GB
+
| max memory          = 4 GiB
 
| max memory addr    =  
 
| max memory addr    =  
  
| electrical          = Yes
+
 
 
| power              =  
 
| power              =  
 
| v core              = 3.3 V
 
| v core              = 3.3 V
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{cache info
 
{{cache info
|l1 cache=8 KB
+
|l1 cache=8 KiB
|l1 break=1x8 KB
+
|l1 break=1x8 KiB
 
|l1 desc=4-way set associative
 
|l1 desc=4-way set associative
 
|l1 extra=(unified, write-back policy)
 
|l1 extra=(unified, write-back policy)

Latest revision as of 14:18, 13 December 2017

Edit Values
Am486DX2-80SV8B
General Info
DesignerAMD
ManufacturerAMD
Model NumberAm486DX2-80SV8B
Part NumberA80486DX2-80SV8B
Introduction1995 (announced)
March, 1996 (launched)
ShopAmazon
General Specs
FamilyAm486
SeriesAm486DX2S
Frequency80 MHz
Bus typeFSB
Bus speed40 MHz
Bus rate40 MT/s
Clock multiplier2
Microarchitecture
Microarchitecture80486
Core NameAm486DX2S
Process500 nm
TechnologyCMOS
Word Size32 bit
Cores1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore3.3 V ± 0.3 V
OP Temperature0 °C – 85 °C

Am486DX2-80SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.

Cache[edit]

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-back policy)

Graphics[edit]

This chip had no integrated graphics processing unit.

Features[edit]

  • Stop-clock control
  • System Management Mode (SMM)

Documents[edit]

See also[edit]

Facts about "Am486DX2-80SV8B - AMD"
base frequency80 MHz (0.08 GHz, 80,000 kHz) +
bus rate40 MT/s (0.04 GT/s, 40,000 kT/s) +
bus speed40 MHz (0.04 GHz, 40,000 kHz) +
bus typeFSB +
clock multiplier2 +
core count1 +
core nameAm486DX2S +
core voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
core voltage tolerance0.3 V +
designerAMD +
familyAm486 +
first announced1995 +
first launchedMarch 1996 +
full page nameamd/am486/am486dx2-80sv8b +
has featureSystem Management Mode +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldateMarch 1996 +
manufacturerAMD +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberAm486DX2-80SV8B +
nameAm486DX2-80SV8B +
part numberA80486DX2-80SV8B +
process500 nm (0.5 μm, 5.0e-4 mm) +
seriesAm486DX2S +
smp max ways1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +