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Difference between revisions of "amd/am486/am486dx2-100v8b"
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{{amd title|Am486DX2-100V8B}} | {{amd title|Am486DX2-100V8B}} | ||
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| name = Am486DX2-100V8B | | name = Am486DX2-100V8B | ||
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| image = | | image = | ||
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| model number = Am486DX2-100V8B | | model number = Am486DX2-100V8B | ||
| part number = A80486DX2-100V8B | | part number = A80486DX2-100V8B | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
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| bus type = FSB | | bus type = FSB | ||
| bus speed = 50 MHz | | bus speed = 50 MHz | ||
− | | bus rate = | + | | bus rate = 50 MT/s |
| clock multiplier = 2 | | clock multiplier = 2 | ||
| cpuid = | | cpuid = | ||
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| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
| max memory addr = | | max memory addr = | ||
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| power = | | power = | ||
| v core = 3.3 V | | v core = 3.3 V | ||
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=8 | + | |l1 cache=8 KiB |
− | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
− | |l1 extra=(unified, write- | + | |l1 extra=(unified, write-through policy) |
}} | }} | ||
Latest revision as of 15:18, 13 December 2017
Edit Values | |
Am486DX2-100V8B | |
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General Info | |
Designer | AMD |
Manufacturer | AMD |
Model Number | Am486DX2-100V8B |
Part Number | A80486DX2-100V8B |
Market | Desktop |
Introduction | 1994 (launched) |
Shop | Amazon |
General Specs | |
Family | Am486 |
Series | Am486DX2V |
Frequency | 100 MHz |
Bus type | FSB |
Bus speed | 50 MHz |
Bus rate | 50 MT/s |
Clock multiplier | 2 |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486DX2V |
Process | 500 nm |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Vcore | 3.3 V ± 0.3 V |
OP Temperature | 0 °C – 85 °C |
Am486DX2-100V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the Am486DX2-100V8T (and older 100). The Am486DX2-100V16B is an identical model with double the L1 cache of this one.
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.