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Difference between revisions of "amd/am486/am486dx2-100v8b"
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{{amd title|Am486DX2-100V8B}} | {{amd title|Am486DX2-100V8B}} | ||
| − | {{ | + | {{chip |
| name = Am486DX2-100V8B | | name = Am486DX2-100V8B | ||
| − | |||
| image = | | image = | ||
| image size = | | image size = | ||
| Line 10: | Line 9: | ||
| model number = Am486DX2-100V8B | | model number = Am486DX2-100V8B | ||
| part number = A80486DX2-100V8B | | part number = A80486DX2-100V8B | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
| Line 25: | Line 24: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 50 MHz | | bus speed = 50 MHz | ||
| − | | bus rate = | + | | bus rate = 50 MT/s |
| clock multiplier = 2 | | clock multiplier = 2 | ||
| cpuid = | | cpuid = | ||
| Line 46: | Line 45: | ||
| thread count = | | thread count = | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 4 | + | | max memory = 4 GiB |
| max memory addr = | | max memory addr = | ||
| − | + | ||
| power = | | power = | ||
| v core = 3.3 V | | v core = 3.3 V | ||
| Line 63: | Line 62: | ||
| packaging = Yes | | packaging = Yes | ||
| − | | package | + | | package 0 = CPGA-168 |
| − | | package type | + | | package 0 type = CPGA |
| − | | package pitch | + | | package 0 pins = 168 |
| − | | package | + | | package 0 pitch = 2.286 mm |
| − | | socket | + | | package 0 width = 44.069 mm |
| − | | socket 2 | + | | package 0 length = 44.069 mm |
| − | | socket 3 | + | | package 0 height = 3.556 mm |
| + | | socket 0 = Socket 1 | ||
| + | | socket 0 type = | ||
| + | | socket 0 2 = Socket 2 | ||
| + | | socket 0 2 type = | ||
| + | | socket 0 3 = Socket 3 | ||
| + | | socket 0 3 type = | ||
}} | }} | ||
| − | '''Am486DX2-100V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of | + | '''Am486DX2-100V8B''' was an {{intel|80486}}-compatible microprocessor introduced by [[AMD]] in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the {{\\|Am486DX2-100V8T}} (and older {{\\|Am486DX2-100|100}}). The {{\\|Am486DX2-100V16B}} is an identical model with double the L1 cache of this one. |
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=8 | + | |l1 cache=8 KiB |
| − | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
| − | |l1 extra=(unified, write- | + | |l1 extra=(unified, write-through policy) |
}} | }} | ||
Latest revision as of 14:18, 13 December 2017
| Edit Values | |
| Am486DX2-100V8B | |
 | |
| General Info | |
| Designer | AMD |
| Manufacturer | AMD |
| Model Number | Am486DX2-100V8B |
| Part Number | A80486DX2-100V8B |
| Market | Desktop |
| Introduction | 1994 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Am486 |
| Series | Am486DX2V |
| Frequency | 100 MHz |
| Bus type | FSB |
| Bus speed | 50 MHz |
| Bus rate | 50 MT/s |
| Clock multiplier | 2 |
| Microarchitecture | |
| Microarchitecture | 80486 |
| Core Name | 486DX2V |
| Process | 500 nm |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 1 |
| Max Memory | 4 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Vcore | 3.3 V ± 0.3 V |
| OP Temperature | 0 °C – 85 °C |
Am486DX2-100V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the Am486DX2-100V8T (and older 100). The Am486DX2-100V16B is an identical model with double the L1 cache of this one.
Cache[edit]
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.