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Difference between revisions of "intel/core i3/i3-6100e"
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{{intel title|Core i3-6100E}}
 
{{intel title|Core i3-6100E}}
−
{{mpu
+
{{chip
−
| name               = Intel Core i3-6100E
+
|name=Core i3-6100E
−
| no image           = Yes
+
|no image=Yes
−
| image               =
+
|image=skylake h (front).png
−
| image size          =
+
|designer=Intel
−
| caption            =  
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=i3-6100E
−
| manufacturer       = Intel
+
|part number=CL8066201939604
−
| model number       = i3-6100E
+
|s-spec=SR2DV
−
| part number         = CL8066201939604
+
|market=Embedded
−
| part number 1      =
+
|first announced=October 12, 2015
−
| part number 2      =
+
|first launched=October 12, 2015
−
| part number 3      =
+
|release price=$225
−
| part number 3      =  
+
|family=Core i3
−
| market             = Mobile
+
|series=i3-6000
−
| first announced     = October 12, 2015
+
|locked=Yes
−
| first launched     = October 12, 2015
+
|frequency=2,700 MHz
−
| last order          =  
+
|bus type=DMI 3.0
−
| last shipment      =
+
|bus links=4
−
 
+
|bus rate=8 GT/s
−
| family             = Core i3
+
|clock multiplier=27
−
| series             = 6100
+
|isa=x86-64
−
| locked             = Yes
+
|isa family=x86
−
| frequency         = 2700 MHz
+
|microarch=Skylake
−
| bus type           = DMI 3.0
+
|core name=Skylake H
−
| bus speed          = 8 GT/s
+
|core family=6
−
| clock multiplier   = 27
+
|core model=94
−
| s-spec            = SR2DV
+
|core stepping=R0
−
 
+
|process=14 nm
−
| microarch          = Skylake  
+
|transistors=1,750,000,000
−
| platform          =  
+
|technology=CMOS
−
| core name          = Skylake H
+
|die area=98.57 mm²
−
| core stepping     = R0
+
|die length=10.3 mm
−
| process           = 14 nm
+
|die width=9.57 mm
−
| die size          =  
+
|word size=64 bit
−
| word size         = 64 bits
+
|core count=2
−
| core count         = 2
+
|thread count=4
−
| thread count       = 4
+
|max cpus=1
−
| max cpus           = 1
+
|max memory=64 GiB
−
| max memory         = 64 GB
+
|v core min=0.55 V
−
 
+
|v core max=1.52 V
−
| electrical          = Yes
+
|tdp=35 W
−
| sdp                =  
+
|temp min=0 °C
−
| tdp                 = 35 W
+
|temp max=100 °C
−
| ctdp down          =
+
|tjunc min=0 °C
−
| ctdp down frequency =
+
|tjunc max=100 °C
−
| ctdp up            =
+
|tstorage min=-25 °C
−
| ctdp up frequency  =
+
|tstorage max=125 °C
−
| temp max           = 100 °C
+
|package module 1={{packages/intel/fcbga-1440}}
−
| temp min           = 0 °C
 
−
 
 
−
| packaging          = Yes
 
−
| package            = FCLGA-1440
 
−
| package type        = FCLGA
 
−
| package pitch      = 0.65 mm
 
−
| package size        = 42 mm x 28 mm
 
−
| socket              = LGA-1440
 
−
| socket type        = LGA
 
 
}}
 
}}
−
'''Core i3-6100E''' is a {{arch|64}} [[dual-core]] low-end mobile [[microprocessor]] introduced by [[Intel]] late 2015. This processor, which is based on the {{intel|Skylake}} microarchitecture and manufactured in [[14 nm process]], has a base frequency of 2.7 GHz with a TDP of 35 W. This processor incorporates the {{intel|HD Graphics 530}} [[GPU]] clocked at 350 MHz with a max frequency of 950 MHz.
+
'''Core i3-6100E''' is a {{arch|64}} [[dual-core]] [[x86]] low-end mobile performance [[microprocessor]] introduced by [[Intel]] in late 2015. The i3-6100E, which is based on the {{intel|Skylake|l=arch}} microarchitecture and is fabricated on a [[14 nm process]], has a base frequency of 2.7 GHz with a TDP of 35 W. This processor incorporates the {{intel|HD Graphics 530}} [[integrated graphics]] operating at 350 MHz with a turbo frequency of 950 MHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
−
{{cache info
+
{{cache size
−
|l1i cache=64 KB
+
|l1 cache=128 KiB
−
|l1i break=2x32 KB
+
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
+
|l1d cache=64 KiB
−
|l1d cache=64 KB
+
|l1d break=2x32 KiB
−
|l1d break=2x32 KB
 
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
−
|l2 cache=512 KB
+
|l2 cache=512 KiB
−
|l2 break=2x256 KB
+
|l2 break=2x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core, write-back)
+
|l2 policy=write-back
−
|l3 cache=3 MB
+
|l3 cache=3 MiB
−
|l3 desc=shared
+
|l3 break=2x1.5 MiB
 +
|l3 policy=write-back
 +
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=LPDDR3-1866
 +
|type 2=DDR3L-1600
 +
|type 3=DDR4-2133
 +
|ecc=Yes
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=31.79 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 +
| pcie config 3      = 1x8+2x4
 
}}
 
}}
  
 
== Graphics ==
 
== Graphics ==
−
{{integrated graphic
+
{{integrated graphics
−
| gpu               = Intel HD Graphics 530
+
| gpu                 = HD Graphics 530
−
| device id         = 0x191B
+
| device id           = 0x191B
−
| displays           = 3
+
| designer            = Intel
−
| frequency         = 350 MHz
+
| execution units    = 24
−
| max frequency     = 950 MHz
+
| max displays       = 3
−
| max memory         = 64 GB
+
| max memory          = 64 GiB
−
| output edp         = Yes
+
| frequency           = 350 MHz
−
| output dp         = Yes
+
| max frequency       = 950 MHz
−
| output hdmi       = Yes
+
 
−
| output vga         =  
+
| output crt          =
−
| output dvi         = Yes
+
| output sdvo         =  
 +
| output dsi          =
 +
| output edp         = Yes
 +
| output dp           = Yes
 +
| output hdmi         = Yes
 +
| output vga         =  
 +
| output dvi         = Yes
 +
 
 
| directx ver        = 12
 
| directx ver        = 12
 
| opengl ver        = 4.4
 
| opengl ver        = 4.4
Line 107: Line 129:
 
| max res vga        =  
 
| max res vga        =  
 
| max res vga freq  =  
 
| max res vga freq  =  
 +
 +
| features            = Yes
 +
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 
}}
 
}}
 +
{{skylake hardware accelerated video table|col=1}}
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
  
−
== Memory controller ==
+
|abm=Yes
−
{{integrated memory controller
+
|tbm=No
−
| type              = DDR3L-1600
+
|bmi1=Yes
−
| type 2            = LPDDR3-1866
+
|bmi2=Yes
−
| type 3            = DDR4-2133
+
|fma3=Yes
−
| controllers        = 1
+
|fma4=No
−
| channels          = 2
+
|aes=Yes
−
| ecc support        = Yes
+
|rdrand=Yes
−
| max bandwidth      = 34.1 GB/s
+
|sha=No
−
| bandwidth schan    =  
+
|xop=No
−
| bandwidth dchan    =  
+
|adx=Yes
−
| bandwidth tchan    =  
+
|clmul=Yes
−
| bandwidth qchan    =  
+
|f16c=Yes
−
| max memory        = 64 GB
+
|tbt1=No
 +
|tbt2=No
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=Yes
 +
|tsx=Yes
 +
|txt=No
 +
|ht=Yes
 +
|vpro=No
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 
}}
 
}}

Latest revision as of 15:17, 13 December 2017

Edit Values
Core i3-6100E
skylake h (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi3-6100E
Part NumberCL8066201939604
S-SpecSR2DV
MarketEmbedded
IntroductionOctober 12, 2015 (announced)
October 12, 2015 (launched)
Release Price$225
ShopAmazon
General Specs
FamilyCore i3
Seriesi3-6000
LockedYes
Frequency2,700 MHz
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier27
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
Core NameSkylake H
Core Family6
Core Model94
Core SteppingR0
Process14 nm
Transistors1,750,000,000
TechnologyCMOS
Die98.57 mm²
10.3 mm × 9.57 mm
Word Size64 bit
Cores2
Threads4
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP35 W
OP Temperature0 °C – 100 °C
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCBGA-1440 (BGA)
Dimension42 mm x 28 mm x 1.49 mm
Pitch0.65 mm
Ball Count1440
Ball CompSAC405
InterconnectBGA-1440

Core i3-6100E is a 64-bit dual-core x86 low-end mobile performance microprocessor introduced by Intel in late 2015. The i3-6100E, which is based on the Skylake microarchitecture and is fabricated on a 14 nm process, has a base frequency of 2.7 GHz with a TDP of 35 W. This processor incorporates the HD Graphics 530 integrated graphics operating at 350 MHz with a turbo frequency of 950 MHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB write-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866, DDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUHD Graphics 530
DesignerIntelDevice ID0x191B
Execution Units24Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency950 MHz
0.95 GHz
950,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-6100e&oldid=70539"
Facts about "Core i3-6100E - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i3-6100E - Intel#package + and Core i3-6100E - Intel#io +
base frequency2,700 MHz (2.7 GHz, 2,700,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
clock multiplier27 +
core count2 +
core family6 +
core model94 +
core nameSkylake H +
core steppingR0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
designerIntel +
device id0x191B +
die area98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die length10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
familyCore i3 +
first announcedOctober 12, 2015 +
first launchedOctober 12, 2015 +
full page nameintel/core i3/i3-6100e +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
ldateOctober 12, 2015 +
main imageFile:skylake h (front).png +
manufacturerIntel +
market segmentEmbedded +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max operating temperature100 °C +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min operating temperature0 °C +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi3-6100E +
nameCore i3-6100E +
packageFCBGA-1440 +
part numberCL8066201939604 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 225.00 (€ 202.50, £ 182.25, ¥ 23,249.25) +
s-specSR2DV +
seriesi3-6000 +
smp max ways1 +
supported memory typeLPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count4 +
transistor count1,750,000,000 +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +