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Difference between revisions of "intel/80486/486dx-33"
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{{intel title|i486DX-33}}
 
{{intel title|i486DX-33}}
{{mpu
+
{{chip
 
| name                = Intel i486DX-33
 
| name                = Intel i486DX-33
 
| image              = Ic-photo-intel-A80486DX-33-(486DX).png
 
| image              = Ic-photo-intel-A80486DX-33-(486DX).png
Line 42: Line 42:
 
| s-spec qs 3        = Q0588
 
| s-spec qs 3        = Q0588
 
| cpuid              = 402
 
| cpuid              = 402
| cpuid               = 404
+
| cpuid 2            = 404
| cpuid               = 414
+
| cpuid 3            = 414
| cpuid               = 415
+
| cpuid 4            = 415
  
 
| microarch          = 80486
 
| microarch          = 80486
Line 61: Line 61:
 
| core count          = 1
 
| core count          = 1
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
| electrical          = Yes
 
 
| power              = 2.5 W
 
| power              = 2.5 W
 
| v core              = 5 V
 
| v core              = 5 V
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| package size        = CPGA
 
| package size        = CPGA
 
| package 2          = PQFP-196
 
| package 2          = PQFP-196
| package type 3     = PQFP
+
| package type 2     = PQFP
 
| package 3          = SQFP-208
 
| package 3          = SQFP-208
 
| package type 3      = SQFP
 
| package type 3      = SQFP
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}}
 
{{cache info
 
{{cache info
|l1 cache=8 KB
+
|l1 cache=8 KiB
|l1 break=1x8 KB
+
|l1 break=1x8 KiB
 
|l1 desc=4-way set associative
 
|l1 desc=4-way set associative
|l1 extra=(unified, write-through policy )
+
|l1 extra=(unified, write-through policy)
 
}}
 
}}
  
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File:Intel 80486DX-33.jpg|A80486DX-33, S-Spec SX329
 
File:Intel 80486DX-33.jpg|A80486DX-33, S-Spec SX329
 
File:Intel i486 DX - (1).jpg|A80486DX-33, S-Spec SX729
 
File:Intel i486 DX - (1).jpg|A80486DX-33, S-Spec SX729
 +
File:Intel i486 dx 33mhz 2007 03 27.jpg|A80486DX-33, S-Spec SX419
 +
File:Intel i486 DX-33.jpg|A80486DX-33, S-Spec SX666
 +
File:Intel i486 DX33 CPU SX 419.jpg|A80486DX-33, S-Spec SX419
 
</gallery>
 
</gallery>
  
 
== See also ==
 
== See also ==
 
* {{intel|80486|80486 family}}
 
* {{intel|80486|80486 family}}

Latest revision as of 01:59, 18 December 2017

Edit Values
Intel i486DX-33
Ic-photo-intel-A80486DX-33-(486DX).png
A80486DX-33, S-Spec SX419
General Info
DesignerIntel
ManufacturerIntel
Model Numberi486DX-33
Part NumberA80486DX-33,
MA80486DX-33,
MG80486DX-33,
MQ80486DX-33,
KU80486DX-33,
SB80486DX-33
S-SpecSX329, SX412, SX419, SX666, SX668, SX729, SX767, SX810, SX829
Q0128 (QS), Q0364 (QS), Q0588 (QS)
IntroductionMay 7, 1990 (launched)
ShopAmazon
General Specs
Family80486
Series486DX
Frequency33 MHz
Bus typeFSB
Bus speed33 MHz
Bus rate33 MT/s
Clock multiplier1
CPUID402, 404, 414, 415
Microarchitecture
Microarchitecture80486
Core Name486DX
Process1 µm, 800 nm
Transistors1,200,000
TechnologyCMOS
Word Size32 bit
Cores1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation2.5 W
Vcore5 V ± 5%
OP Temperature0 °C – 85 °C

i486DX-33 was a fourth-generation x86 microprocessor introduced by Intel in 1990. This chip, which is based on the 80486 microarchitecture, operated at 33 MHz. This chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).

Cache[edit]

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KiB
8,192 B
0.00781 MiB
1x8 KiB 4-way set associative (unified, write-through policy)

Graphics[edit]

This chip had no integrated graphics processing unit.

Features[edit]

Gallery[edit]

See also[edit]

Facts about "i486DX-33 - Intel"
l1$ description4-way set associative +