Semiconductor & Computer Engineering
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Difference between revisions of "intel/80486/486sl-20"
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{{intel title|i486SL-20}} | {{intel title|i486SL-20}} | ||
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| name = Intel i486SL-20 | | name = Intel i486SL-20 | ||
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| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 4 | + | | max memory = 4 GiB |
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| power = | | power = | ||
| v core = 3.3 V | | v core = 3.3 V | ||
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{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=8 | + | |l1 cache=8 KiB |
| − | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-through policy) | |l1 extra=(unified, write-through policy) | ||
Latest revision as of 15:13, 13 December 2017
| Edit Values | |
| Intel i486SL-20 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | i486SL-20 |
| Part Number | KU80486SL-20 |
| Introduction | November 9, 1992 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | 80486 |
| Series | 486SL |
| Frequency | 20 MHz |
| Bus type | FSB |
| Bus speed | 20 MHz |
| Bus rate | 20 MT/s |
| Clock multiplier | 1 |
| Microarchitecture | |
| Microarchitecture | 80486 |
| Core Name | 486SL |
| Process | 800 nm |
| Transistors | 1,400,000 |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 1 |
| Max Memory | 4 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Vcore | 3.3 V ± 0.3 V |
| OP Temperature | 0 °C – 85 °C |
i486SL-20 was a fourth-generation x86 microprocessor introduced by Intel in 1992. This chip, which is based on the 80486 microarchitecture, operated at 20 MHz. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM). This series was designed to be a low power version of the i486DX, offering lower voltage and power saving features for portable mobile computers.
Contents
Cache[edit]
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)