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Difference between revisions of "intel/80486/486sx2-50"
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{{intel title|i486SX2-50}} | {{intel title|i486SX2-50}} | ||
− | {{ | + | {{chip |
| name = Intel i486SX2-50 | | name = Intel i486SX2-50 | ||
− | + | | image = KL intel i486SX2.jpg | |
− | | image = | ||
| image size = | | image size = | ||
− | | caption = | + | | caption = A80486SX2-50, S-Spec SX845 |
| designer = Intel | | designer = Intel | ||
| manufacturer = Intel | | manufacturer = Intel | ||
Line 25: | Line 24: | ||
| bus rate = 25 MT/s | | bus rate = 25 MT/s | ||
| clock multiplier = 2 | | clock multiplier = 2 | ||
− | | s-spec = | + | | s-spec = SX845 |
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = Q0498 |
− | | cpuid = | + | | s-spec qs 2 = Q0576 |
+ | | cpuid = 45B | ||
| microarch = 80486 | | microarch = 80486 | ||
Line 44: | Line 44: | ||
| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 4 | + | | max memory = 4 GiB |
− | + | ||
− | | power = | + | | power = 3.08 W |
| v core = 5 V | | v core = 5 V | ||
− | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C | ||
Line 61: | Line 61: | ||
| socket 3 = Socket 3 | | socket 3 = Socket 3 | ||
}} | }} | ||
+ | '''i486SX2-50''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in the early 1990s. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional [[FPU]] on-die. | ||
+ | |||
+ | == Cache == | ||
+ | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
+ | {{cache info | ||
+ | |l1 cache=8 KiB | ||
+ | |l1 break=1x8 KiB | ||
+ | |l1 desc=4-way set associative | ||
+ | |l1 extra=(unified, write-through policy) | ||
+ | }} | ||
+ | |||
+ | == Graphics == | ||
+ | This chip had no integrated graphics processing unit. | ||
+ | |||
+ | == Features == | ||
+ | * {{intel|System Management Mode}} (SMM) | ||
+ | |||
+ | == Gallery == | ||
+ | <gallery> | ||
+ | File:Ic-photo-intel-A80486SX2-50-(486SX2).png|A80486SX2-50, S-Spec SX845 | ||
+ | </gallery> | ||
+ | |||
+ | == See also == | ||
+ | * {{intel|80486|80486 family}} |
Latest revision as of 15:14, 13 December 2017
Edit Values | |
Intel i486SX2-50 | |
A80486SX2-50, S-Spec SX845 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | i486SX2-50 |
Part Number | A80486SX2-50, A80486SX250 |
S-Spec | SX845 Q0498 (QS), Q0576 (QS) |
Shop | Amazon |
General Specs | |
Family | 80486 |
Series | 486SX2 |
Frequency | 50 MHz |
Bus type | FSB |
Bus speed | 25 MHz |
Bus rate | 25 MT/s |
Clock multiplier | 2 |
CPUID | 45B |
Microarchitecture | |
Microarchitecture | 80486 |
Core Name | 486SX2 |
Process | 800 nm |
Transistors | 900,000 |
Technology | CMOS |
Word Size | 32 bit |
Cores | 1 |
Max Memory | 4 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 3.08 W |
Vcore | 5 V ± 5% |
OP Temperature | 0 °C – 85 °C |
i486SX2-50 was a fourth-generation x86 microprocessor introduced by Intel in the early 1990s. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 50 MHz, twice the bus speed. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.
Contents
Cache[edit]
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)