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Difference between revisions of "intel/80486/486sx-20"
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{{intel title|i486SX-20}} | {{intel title|i486SX-20}} | ||
| − | {{ | + | {{chip |
| name = Intel i486SX-20 | | name = Intel i486SX-20 | ||
| no image = Yes | | no image = Yes | ||
| Line 26: | Line 26: | ||
| bus rate = 20 MT/s | | bus rate = 20 MT/s | ||
| clock multiplier = 1 | | clock multiplier = 1 | ||
| − | | s-spec = | + | | s-spec = SX406 |
| + | | s-spec 2 = SX467 | ||
| + | | s-spec 3 = SX492 | ||
| + | | s-spec 4 = SX678 | ||
| + | | s-spec 5 = SXE63 | ||
| + | | s-spec 6 = SX587 | ||
| + | | s-spec 7 = SX632 | ||
| + | | s-spec 8 = SX672 | ||
| + | | s-spec 9 = SZ700 | ||
| + | | s-spec 10 = SZ740 | ||
| s-spec es = | | s-spec es = | ||
| s-spec qs = | | s-spec qs = | ||
| − | | cpuid = | + | | cpuid = 420 |
| microarch = 80486 | | microarch = 80486 | ||
| Line 39: | Line 48: | ||
| core stepping = | | core stepping = | ||
| process = 1 µm | | process = 1 µm | ||
| − | | transistors = 900,000 | + | | process 2 = 800 nm |
| + | | transistors = 1,185,000 | ||
| + | | transistors 2 = 900,000 | ||
| technology = CMOS | | technology = CMOS | ||
| die size = | | die size = | ||
| Line 45: | Line 56: | ||
| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
| − | | max memory = 4 | + | | max memory = 4 GiB |
| − | + | ||
| − | | power = | + | | power = 2.25 W |
| v core = 5 V | | v core = 5 V | ||
| − | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C | ||
| Line 68: | Line 79: | ||
| socket 3 = Socket 3 | | socket 3 = Socket 3 | ||
}} | }} | ||
| + | '''i486SX-20''' was a fourth-generation [[x86]] [[microprocessor]] introduced by [[Intel]] in 1991. This chip, which is based on the {{intel|microarchitectures/80486|80486 microarchitecture}}, operated at 20 MHz. In contrast to the i486DX chips, the i486SX line had no functional [[FPU]] on-die. | ||
| + | |||
| + | == Cache == | ||
| + | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
| + | {{cache info | ||
| + | |l1 cache=8 KiB | ||
| + | |l1 break=1x8 KiB | ||
| + | |l1 desc=4-way set associative | ||
| + | |l1 extra=(unified, write-through policy) | ||
| + | }} | ||
| + | |||
| + | == Graphics == | ||
| + | This chip had no integrated graphics processing unit. | ||
| + | |||
| + | == Features == | ||
| + | * {{intel|System Management Mode}} (SMM) | ||
| + | |||
| + | == See also == | ||
| + | * {{intel|80486|80486 family}} | ||
Latest revision as of 16:14, 13 December 2017
| Edit Values | |
| Intel i486SX-20 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | i486SX-20 |
| Part Number | A80486SX-20, KU80486SX-20, 03G9565 |
| S-Spec | SX406, SX467, SX492, SX678, SXE63, SX587, SX632, SX672, SZ700, SZ740 |
| Introduction | September 16, 1991 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | 80486 |
| Series | 486SX |
| Frequency | 20 MHz |
| Bus type | FSB |
| Bus speed | 20 MHz |
| Bus rate | 20 MT/s |
| Clock multiplier | 1 |
| CPUID | 420 |
| Microarchitecture | |
| Microarchitecture | 80486 |
| Core Name | 486SX |
| Process | 1 µm, 800 nm |
| Transistors | 1,185,000 |
| Technology | CMOS |
| Word Size | 32 bit |
| Cores | 1 |
| Max Memory | 4 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Power dissipation | 2.25 W |
| Vcore | 5 V ± 5% |
| OP Temperature | 0 °C – 85 °C |
i486SX-20 was a fourth-generation x86 microprocessor introduced by Intel in 1991. This chip, which is based on the 80486 microarchitecture, operated at 20 MHz. In contrast to the i486DX chips, the i486SX line had no functional FPU on-die.
Contents
Cache[edit]
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- System Management Mode (SMM)