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Difference between revisions of "intel/xeon e3/e3-1275 v5"
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| − | {{intel title|Xeon E3-1275 | + | {{intel title|Xeon E3-1275 v5}} |
| − | {{ | + | {{chip |
| − | | name | + | |name=Xeon E3-1275 v5 |
| − | | | + | |image=skylake dt (front).png |
| − | + | |designer=Intel | |
| − | + | |manufacturer=Intel | |
| − | + | |model number=E3-1275 v5 | |
| − | | designer | + | |part number=CM8066201934909 |
| − | | manufacturer | + | |part number 2=BX80662E31275V5 |
| − | | model number | + | |s-spec=SR2CT |
| − | | part number | + | |s-spec 2=SR2LK |
| − | | part number 2 | + | |market=Server |
| − | | market | + | |market 2=Embedded |
| − | | first announced | + | |first announced=October 19, 2015 |
| − | | first launched | + | |first launched=October 19, 2015 |
| − | | last order | + | |last order=October 26, 2018 |
| − | | last shipment | + | |last shipment=April 12, 2019 |
| − | + | |release price=$350 | |
| − | | family | + | |family=Xeon E3 |
| − | | series | + | |series=E3-1200 v5 |
| − | | locked | + | |locked=Yes |
| − | | frequency | + | |frequency=3,600 MHz |
| − | | turbo | + | |turbo frequency1=4,000 MHz |
| − | | turbo | + | |turbo frequency2=3,900 MHz |
| − | | turbo | + | |turbo frequency3=3,800 MHz |
| − | | turbo | + | |turbo frequency4=3,700 MHz |
| − | | turbo | + | |turbo frequency=Yes |
| − | | bus type | + | |bus type=DMI 3.0 |
| − | | bus | + | |bus links=4 |
| − | | bus rate | + | |bus rate=8 GT/s |
| − | | clock multiplier | + | |clock multiplier=36 |
| − | | | + | |cpuid=506E3 |
| − | + | |isa=x86-64 | |
| − | | | + | |isa family=x86 |
| − | + | |microarch=Skylake | |
| − | | | + | |platform=Greenlow |
| − | + | |chipset=Sunrise Point | |
| − | | microarch | + | |core name=Skylake DT |
| − | | platform | + | |core family=6 |
| − | | chipset | + | |core model=94 |
| − | | core name | + | |core stepping=R0 |
| − | | core family | + | |process=14 nm |
| − | | core model | + | |technology=CMOS |
| − | | core stepping | + | |die area=122 mm² |
| − | | process | + | |word size=64 bit |
| − | + | |core count=4 | |
| − | | technology | + | |thread count=8 |
| − | | die | + | |max cpus=1 |
| − | | word size | + | |max memory=64 GiB |
| − | | core count | + | |v core min=0.55 V |
| − | | thread count | + | |v core max=1.52 V |
| − | | max cpus | + | |tdp=80 W |
| − | | max memory | + | |tjunc min=0 °C |
| − | + | |tjunc max=100 °C | |
| − | + | |tstorage min=-25 °C | |
| − | | v core | + | |tstorage max=125 °C |
| − | | v core | + | |package module 1={{packages/intel/lga-1151}} |
| − | |||
| − | | tdp | ||
| − | | | ||
| − | | | ||
| − | |||
| − | |||
| − | |||
| − | | | ||
| − | |||
| − | | | ||
| − | | package | ||
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| − | |||
| − | |||
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}} | }} | ||
| − | + | '''Xeon E3-1275 v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 3.6 GHz with turbo boost of 4 GHz. The E3-1275 V5 has a TDP of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]]. | |
== Cache == | == Cache == | ||
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | ||
| − | {{cache | + | {{cache size |
| − | |l1i cache=128 | + | |l1 cache=256 KiB |
| − | |l1i break=4x32 | + | |l1i cache=128 KiB |
| + | |l1i break=4x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
| − | + | |l1d cache=128 KiB | |
| − | |l1d cache=128 | + | |l1d break=4x32 KiB |
| − | |l1d break=4x32 | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
| − | |l1d | + | |l1d policy=write-back |
| − | |l2 cache=1 | + | |l2 cache=1 MiB |
| − | |l2 break=4x256 | + | |l2 break=4x256 KiB |
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
| − | |l2 | + | |l2 policy=write-back |
| − | |l3 cache=8 | + | |l3 cache=8 MiB |
| − | |l3 break=4x2 | + | |l3 break=4x2 MiB |
| − | |l3 | + | |l3 policy=write-back |
| − | | | + | }} |
| + | |||
| + | == Memory controller == | ||
| + | {{memory controller | ||
| + | |type=DDR3L-1600 | ||
| + | |type 2=DDR4-2133 | ||
| + | |ecc=Yes | ||
| + | |max mem=64 GiB | ||
| + | |controllers=1 | ||
| + | |channels=2 | ||
| + | |max bandwidth=31.79 GiB/s | ||
| + | |bandwidth schan=15.89 GiB/s | ||
| + | |bandwidth dchan=31.79 GiB/s | ||
}} | }} | ||
| + | |||
| + | == Expansions == | ||
| + | {{expansions | ||
| + | | pcie revision = 3.0 | ||
| + | | pcie lanes = 16 | ||
| + | | pcie config = 1x16 | ||
| + | | pcie config 2 = 2x8 | ||
| + | | pcie config 3 = 1x8+2x4 | ||
| + | }} | ||
| + | |||
== Graphics == | == Graphics == | ||
| − | {{integrated | + | {{integrated graphics |
| − | | gpu = | + | | gpu = HD Graphics P530 |
| device id = 0x191D | | device id = 0x191D | ||
| + | | designer = Intel | ||
| execution units = 24 | | execution units = 24 | ||
| − | | displays | + | | max displays = 3 |
| + | | max memory = 1.7 GiB | ||
| frequency = 400 MHz | | frequency = 400 MHz | ||
| − | | max frequency = 1 | + | | max frequency = 1,150 MHz |
| − | |||
| output crt = | | output crt = | ||
| Line 113: | Line 121: | ||
| output dvi = Yes | | output dvi = Yes | ||
| − | | directx ver | + | | directx ver = 12 |
| − | | opengl ver | + | | opengl ver = 4.4 |
| − | | opencl ver | + | | opencl ver = 2.0 |
| − | | | + | | hdmi ver = 1.4a |
| − | | | + | | dp ver = 1.2 |
| − | | | + | | edp ver = 1.3 |
| − | | | + | | max res hdmi = 4096x2304 |
| − | | | + | | max res hdmi freq = 24 Hz |
| − | | dp | + | | max res dp = 4096x2304 |
| − | | edp | + | | max res dp freq = 60 Hz |
| + | | max res edp = 4096x2304 | ||
| + | | max res edp freq = 60 Hz | ||
| + | | max res vga = | ||
| + | | max res vga freq = | ||
| − | | | + | | features = Yes |
| − | | | + | | intel quick sync = Yes |
| − | | | + | | intel intru 3d = Yes |
| − | | | + | | intel insider = |
| − | | | + | | intel widi = |
| − | | | + | | intel fdi = |
| − | | | + | | intel clear video = Yes |
| − | | | + | | intel clear video hd = Yes |
| − | + | }} | |
| − | | | + | {{skylake hardware accelerated video table|col=1}} |
| − | |||
| − | |||
| − | | | + | == Features == |
| − | | | + | {{x86 features |
| − | | | + | |real=Yes |
| − | | | + | |protected=Yes |
| − | | | + | |smm=Yes |
| − | | | + | |fpu=Yes |
| − | + | |x8616=Yes | |
| + | |x8632=Yes | ||
| + | |x8664=Yes | ||
| + | |nx=Yes | ||
| + | |mmx=Yes | ||
| + | |emmx=Yes | ||
| + | |sse=Yes | ||
| + | |sse2=Yes | ||
| + | |sse3=Yes | ||
| + | |ssse3=Yes | ||
| + | |sse41=Yes | ||
| + | |sse42=Yes | ||
| + | |sse4a=No | ||
| + | |avx=Yes | ||
| + | |avx2=Yes | ||
| − | == | + | |abm=Yes |
| − | + | |tbm=No | |
| − | | | + | |bmi1=Yes |
| − | | | + | |bmi2=Yes |
| − | | | + | |fma3=Yes |
| − | | | + | |fma4=No |
| − | | | + | |aes=Yes |
| − | | | + | |rdrand=Yes |
| − | | | + | |sha=No |
| − | | | + | |xop=No |
| − | | | + | |adx=Yes |
| − | | | + | |clmul=Yes |
| − | | | + | |f16c=Yes |
| − | | | + | |tbt1=No |
| − | | | + | |tbt2=Yes |
| − | | | + | |tbmt3=No |
| − | | | + | |bpt=No |
| + | |eist=Yes | ||
| + | |sst=No | ||
| + | |flex=No | ||
| + | |fastmem=No | ||
| + | |isrt=No | ||
| + | |sba=No | ||
| + | |mwt=No | ||
| + | |sipp=No | ||
| + | |att=No | ||
| + | |ipt=No | ||
| + | |tsx=Yes | ||
| + | |txt=Yes | ||
| + | |ht=Yes | ||
| + | |vpro=Yes | ||
| + | |vtx=Yes | ||
| + | |vtd=Yes | ||
| + | |ept=Yes | ||
| + | |mpx=Yes | ||
| + | |sgx=Yes | ||
| + | |securekey=Yes | ||
| + | |osguard=Yes | ||
| + | |3dnow=No | ||
| + | |e3dnow=No | ||
| + | |smartmp=No | ||
| + | |powernow=No | ||
| + | |amdvi=No | ||
| + | |amdv=No | ||
| + | |amdsme=No | ||
| + | |amdtsme=No | ||
| + | |amdsev=No | ||
| + | |rvi=No | ||
| + | |smt=No | ||
| + | |sensemi=No | ||
| + | |xfr=No | ||
}} | }} | ||
Latest revision as of 23:27, 6 April 2018
| Edit Values | ||||||||||||
| Xeon E3-1275 v5 | ||||||||||||
| General Info | ||||||||||||
| Designer | Intel | |||||||||||
| Manufacturer | Intel | |||||||||||
| Model Number | E3-1275 v5 | |||||||||||
| Part Number | CM8066201934909, BX80662E31275V5 | |||||||||||
| S-Spec | SR2CT, SR2LK | |||||||||||
| Market | Server, Embedded | |||||||||||
| Introduction | October 19, 2015 (announced) October 19, 2015 (launched) | |||||||||||
| End-of-life | October 26, 2018 (last order) April 12, 2019 (last shipment) | |||||||||||
| Release Price | $350 | |||||||||||
| Shop | Amazon | |||||||||||
| General Specs | ||||||||||||
| Family | Xeon E3 | |||||||||||
| Series | E3-1200 v5 | |||||||||||
| Locked | Yes | |||||||||||
| Frequency | 3,600 MHz | |||||||||||
| Turbo Frequency | Yes | |||||||||||
| Turbo Frequency | 4,000 MHz (1 core), 3,900 MHz (2 cores), 3,800 MHz (3 cores), 3,700 MHz (4 cores) | |||||||||||
| Bus type | DMI 3.0 | |||||||||||
| Bus rate | 4 × 8 GT/s | |||||||||||
| Clock multiplier | 36 | |||||||||||
| CPUID | 506E3 | |||||||||||
| Microarchitecture | ||||||||||||
| ISA | x86-64 (x86) | |||||||||||
| Microarchitecture | Skylake | |||||||||||
| Platform | Greenlow | |||||||||||
| Chipset | Sunrise Point | |||||||||||
| Core Name | Skylake DT | |||||||||||
| Core Family | 6 | |||||||||||
| Core Model | 94 | |||||||||||
| Core Stepping | R0 | |||||||||||
| Process | 14 nm | |||||||||||
| Technology | CMOS | |||||||||||
| Die | 122 mm² | |||||||||||
| Word Size | 64 bit | |||||||||||
| Cores | 4 | |||||||||||
| Threads | 8 | |||||||||||
| Max Memory | 64 GiB | |||||||||||
| Multiprocessing | ||||||||||||
| Max SMP | 1-Way (Uniprocessor) | |||||||||||
| Electrical | ||||||||||||
| Vcore | 0.55 V-1.52 V | |||||||||||
| TDP | 80 W | |||||||||||
| Tjunction | 0 °C – 100 °C | |||||||||||
| Tstorage | -25 °C – 125 °C | |||||||||||
| Packaging | ||||||||||||
| ||||||||||||
Xeon E3-1275 v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.6 GHz with turbo boost of 4 GHz. The E3-1275 V5 has a TDP of 80 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has the HD Graphics P530 IGP.
Cache[edit]
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options
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Graphics[edit]
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Integrated Graphics Information
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| [Edit] Skylake (Gen9) Hardware Accelerated Video Capabilities | |||||||
|---|---|---|---|---|---|---|---|
| Codec | Encode | Decode | |||||
| Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
| MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
| MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, SHP, MHP | 5.1 | 2160p (4K) | |
| JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
| HEVC (H.265) | Main | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
| VC-1 | ✘ | Advanced, Main, Simple | 3, High | 3840x3840 | |||
| VP8 | Unified | Unified | - | 0 | Unified | 1080p | |
| VP9 | ✘ | 0 | Unified | 2160p (4K) | |||
Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon E3-1275 v5 - Intel"
| device id | 0x191D + |
| has feature | integrated gpu + |
| integrated gpu | Intel HD Graphics P530 + |
| integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + |
| integrated gpu max frequency | 1,150 MHz (1.15 GHz, 1,150,000 KHz) + |
| l1d$ description | 8-way set associative + |
| l1i$ description | 8-way set associative + |
| l2$ description | 4-way set associative + |