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| clock max        = 500 kHz
 
| clock max        = 500 kHz
 
| package          = DIP16
 
| package          = DIP16
−
| package 2        = DIP24
+
| package 2         = DIP20
−
| package 3         = DIP28
+
| package 3         = DIP24
−
| package 4         = DIP40
+
| package 4         = DIP28
 +
| package 5         = DIP40
 
}}
 
}}
 
The '''COP400''' or '''COPS II''' or simply '''COPS''' ('''Controller Oriented Processor System II''') was a [[microprocessor family|family]] of {{arch|4}} [[microcontroller]]s developed by [[National Semiconductor]]. The family was introduced a year after the {{national|cops i|COPS I}} in 1977. Components in the COPS II were made in [[nMOS]] and [[CMOS]] technology instead of [[pMOS]] as used in COPS I. The COPS II obsoleted the COPS I family soon after release.
 
The '''COP400''' or '''COPS II''' or simply '''COPS''' ('''Controller Oriented Processor System II''') was a [[microprocessor family|family]] of {{arch|4}} [[microcontroller]]s developed by [[National Semiconductor]]. The family was introduced a year after the {{national|cops i|COPS I}} in 1977. Components in the COPS II were made in [[nMOS]] and [[CMOS]] technology instead of [[pMOS]] as used in COPS I. The COPS II obsoleted the COPS I family soon after release.
 +
 +
In late 1981 National Semiconductor introduced a number of dual-core microcontrollers, one of the earliest instances of multiple CPUs in on single integrated circuit.
  
 
==2nd sources==
 
==2nd sources==
−
National Semiconductor, while almost exclusively never 2nd sourcing their own designs, did license the COPS II to [[Western Digital]] in 1980. WD continued manufacturing the COPS II until 1984 when they moved into the data storage market.
+
* [[Western Digital]]
 +
* [[SGS-Thomson]]
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* [[Texas Instruments]]
  
 
== Members ==
 
== Members ==
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|-
 
|-
 
! Part !! ROM !! RAM !! Frequency !! Package !!  Notes
 
! Part !! ROM !! RAM !! Frequency !! Package !!  Notes
 +
|-
 +
| {{\|COP310C}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP24 || CMOS, extended temperature version of 410
 +
|-
 +
| {{\|COP311C}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP16 || CMOS, extended temperature version of 411
 +
|-
 +
| {{\|COP324C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP28 || extended temperature version of 424
 +
|-
 +
| {{\|COP325C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP24 || extended temperature version of 425
 +
|-
 +
| {{\|COP326C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP20  || extended temperature version of 426
 
|-
 
|-
 
| {{\|COP402}} || || 256 b || 250 kHz - 500 kHz || DIP40 || ROM-less version of {{\|COP420}}, for prototyping
 
| {{\|COP402}} || || 256 b || 250 kHz - 500 kHz || DIP40 || ROM-less version of {{\|COP420}}, for prototyping
Line 48: Line 63:
 
| {{\|COP413L}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 ||
 
| {{\|COP413L}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 ||
 
|-
 
|-
−
| {{\|COP413L}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 || CMOS version of 413
+
| {{\|COP413C}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 || CMOS version of 413
 
|-
 
|-
 
| {{\|COP414L}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 ||
 
| {{\|COP414L}} || 512 B || 128 b || 4.098 kHz - 62.5 kHz || DIP20 ||
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|-
 
|-
 
| {{\|COP421L}} || 1,024 B || 256 b || 62.5 kHz - 250 kHz || DIP24 || Low-power version
 
| {{\|COP421L}} || 1,024 B || 256 b || 62.5 kHz - 250 kHz || DIP24 || Low-power version
 +
|-
 +
| {{\|COP424C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP28 || rowspan="3" | Enhanced version of {{\|COP420}}, obsoleted it
 +
|-
 +
| {{\|COP425C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP24
 +
|-
 +
| {{\|COP426C}} || 2,048 B || 512 b || 62.5 kHz - 250 kHz || DIP20
 
|-
 
|-
 
| {{\|COP444L}} || 2,048 B || 512 b || 250 kHz - 500 kHz || DIP28 || Identical to {{\|COP420}}, twice the memory (2xROM/2xRAM)
 
| {{\|COP444L}} || 2,048 B || 512 b || 250 kHz - 500 kHz || DIP28 || Identical to {{\|COP420}}, twice the memory (2xROM/2xRAM)
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|-
 
|-
 
| colspan="6" | <small>DIP28 and DIP24 chips are architecturally identical; 4 IN ports are simply omitted on the smaller package.</small>
 
| colspan="6" | <small>DIP28 and DIP24 chips are architecturally identical; 4 IN ports are simply omitted on the smaller package.</small>
 +
|}
 +
=== Dual cores ===
 +
Announced in 1981 and manufactured later that year, National introduced a number of dual-core microcontrollers. While primitive by today's standard (no notion of [[mutual exclusion]]), those chips were true dual core - perform calculations independently of each other and capable of accessing the same ROM, RAM, and I/O ports.
 +
{| class="wikitable sortable"
 +
|-
 +
! Part !! ROM !! RAM !! Frequency !! Package !!  Notes
 +
|-
 +
| {{\|COP2340}} || 2,048 B || 640 b ||  ||  || Identical to {{\|COP2440}}, extended temperature
 +
|-
 +
| {{\|COP2404}} || ||  ||  ||  || ROM-less version of {{\|COP2440}}, for prototyping
 +
|-
 +
| {{\|COP2440}} || 2,048 B || 640 b ||  ||  ||
 +
|-
 +
| {{\|COP2441}} || ||  ||  ||  ||
 +
|-
 +
| {{\|COP2442}} || ||  ||  ||  ||
 +
|-
 
|}
 
|}
  

Latest revision as of 21:49, 5 February 2016

National COP400
no photo (ic).svg
Developer National Semiconductor
Manufacturer National Semiconductor
Type microcontrollers
Production 1977
ISA COP400
Word size 4 bit
0.5 octets
1 nibbles
Technology nMOS, CMOS
Clock 4.098 kHz-500 kHz
Package DIP16, DIP20, DIP24, DIP28, DIP40

The COP400 or COPS II or simply COPS (Controller Oriented Processor System II) was a family of 4-bit microcontrollers developed by National Semiconductor. The family was introduced a year after the COPS I in 1977. Components in the COPS II were made in nMOS and CMOS technology instead of pMOS as used in COPS I. The COPS II obsoleted the COPS I family soon after release.

In late 1981 National Semiconductor introduced a number of dual-core microcontrollers, one of the earliest instances of multiple CPUs in on single integrated circuit.

2nd sources[edit]

Members[edit]

Part ROM RAM Frequency Package Notes
COP310C 512 B 128 b 4.098 kHz - 62.5 kHz DIP24 CMOS, extended temperature version of 410
COP311C 512 B 128 b 4.098 kHz - 62.5 kHz DIP16 CMOS, extended temperature version of 411
COP324C 2,048 B 512 b 62.5 kHz - 250 kHz DIP28 extended temperature version of 424
COP325C 2,048 B 512 b 62.5 kHz - 250 kHz DIP24 extended temperature version of 425
COP326C 2,048 B 512 b 62.5 kHz - 250 kHz DIP20 extended temperature version of 426
COP402 256 b 250 kHz - 500 kHz DIP40 ROM-less version of COP420, for prototyping
COP402M 256 b 250 kHz - 500 kHz DIP40 ROM-less version of COP420, for prototyping, for MICROBUS
COP404L 512 b 250 kHz - 500 kHz DIP28 ROM-less version of COP444L, for prototyping
COP410L 512 B 128 b 4.098 kHz - 62.5 kHz DIP24
COP410C 512 B 128 b 4.098 kHz - 62.5 kHz DIP24 CMOS version of 410
COP411L 512 B 128 b 4.098 kHz - 62.5 kHz DIP16
COP411C 512 B 128 b 4.098 kHz - 62.5 kHz DIP16 CMOS version of 411
COP413L 512 B 128 b 4.098 kHz - 62.5 kHz DIP20
COP413C 512 B 128 b 4.098 kHz - 62.5 kHz DIP20 CMOS version of 413
COP414L 512 B 128 b 4.098 kHz - 62.5 kHz DIP20
COP420 1,024 B 256 b 250 kHz - 500 kHz DIP28
COP420L 1,024 B 256 b 62.5 kHz - 250 kHz DIP28 Low-power version
COP420C 1,024 B 256 b 4.098 kHz - 62.5 kHz DIP28 CMOS version of 420
COP421 1,024 B 256 b 250 kHz - 500 kHz DIP24 Identical to COP420, but DIP24
COP421L 1,024 B 256 b 62.5 kHz - 250 kHz DIP24 Low-power version
COP424C 2,048 B 512 b 62.5 kHz - 250 kHz DIP28 Enhanced version of COP420, obsoleted it
COP425C 2,048 B 512 b 62.5 kHz - 250 kHz DIP24
COP426C 2,048 B 512 b 62.5 kHz - 250 kHz DIP20
COP444L 2,048 B 512 b 250 kHz - 500 kHz DIP28 Identical to COP420, twice the memory (2xROM/2xRAM)
COP444C 2,048 B 512 b 250 kHz - 500 kHz DIP28 CMOS version of 444
COP445L 2,048 B 512 b 250 kHz - 500 kHz DIP24 Identical to COP444L, but DIP24
COP445C 2,048 B 512 b 250 kHz - 500 kHz DIP24 CMOS version of 445
DIP28 and DIP24 chips are architecturally identical; 4 IN ports are simply omitted on the smaller package.

Dual cores[edit]

Announced in 1981 and manufactured later that year, National introduced a number of dual-core microcontrollers. While primitive by today's standard (no notion of mutual exclusion), those chips were true dual core - perform calculations independently of each other and capable of accessing the same ROM, RAM, and I/O ports.

Part ROM RAM Frequency Package Notes
COP2340 2,048 B 640 b Identical to COP2440, extended temperature
COP2404 ROM-less version of COP2440, for prototyping
COP2440 2,048 B 640 b
COP2441
COP2442

Design[edit]

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COP400 ISA[edit]

Main article: COP400 ISA
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Documents[edit]


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Facts about "COPS II - National Semiconductor"
RDF feed
designerNational Semiconductor +
full page namenational semiconductor/cops ii +
instance ofmicrocontroller family +
instruction set architectureCOP400 +
main designerNational Semiconductor +
manufacturerNational Semiconductor +
nameNational COP400 +
packageDIP16 +, DIP24 +, DIP28 + and DIP40 +
technologynMOS + and CMOS +
word size4 bit (0.5 octets, 1 nibbles) +