From WikiChip
Difference between revisions of "24-bit architecture"

m
(24-bit systems)
 
(One intermediate revision by one other user not shown)
Line 5: Line 5:
 
* {{motorola|56000|56K Family}}
 
* {{motorola|56000|56K Family}}
  
 +
== 24-bit systems ==
 +
* {{harris|500|Harris 500}}
 +
* {{decc|PDP-2}}
  
 
{{stub}}
 
{{stub}}
 
[[Category:24-bit microprocessors]]
 
[[Category:24-bit microprocessors]]

Latest revision as of 10:06, 28 May 2017

Architecture word sizes
v · d · e

The 24-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 24 bits or 3 octets. These architectures typically have a matching register file with registers width of 24 bits.

24-bit digital signal processors[edit]

24-bit systems[edit]

Text document with shapes.svg This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information.