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Difference between revisions of "intel/core i5/i5-540m"
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{{intel title|Core i5-540M}} | {{intel title|Core i5-540M}} | ||
− | {{ | + | {{chip |
| name = Intel Core i5-540M | | name = Intel Core i5-540M | ||
| no image = yes | | no image = yes | ||
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| model number = i5-540M | | model number = i5-540M | ||
| part number = BX80617I5540M | | part number = BX80617I5540M | ||
− | | part number | + | | part number 2 = CP80617004116AD |
− | | part number | + | | part number 3 = CN80617004116AD |
| market = Mobile | | market = Mobile | ||
| first announced = January 7, 2010 | | first announced = January 7, 2010 | ||
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|avx=No | |avx=No | ||
|avx2=No | |avx2=No | ||
− | + | ||
|abm=No | |abm=No | ||
|tbm=No | |tbm=No |
Latest revision as of 04:07, 31 March 2020
Edit Values | ||||||||||||
Intel Core i5-540M | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | i5-540M | |||||||||||
Part Number | BX80617I5540M, CP80617004116AD, CN80617004116AD | |||||||||||
S-Spec | SLBPG, SLBPF, SLC2D, SLBTV | |||||||||||
Market | Mobile | |||||||||||
Introduction | January 7, 2010 (announced) January 7, 2010 (launched) | |||||||||||
Release Price | $257 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Core i5 | |||||||||||
Series | i5-500 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 2,533.33 MHz | |||||||||||
Turbo Frequency | Yes | |||||||||||
Turbo Frequency | 3,066.66 MHz (1 core), 2,799.99 MHz (2 cores) | |||||||||||
Bus type | DMI 1.0 | |||||||||||
Bus rate | 1 × 2.5 GT/s | |||||||||||
Clock multiplier | 19 | |||||||||||
CPUID | 0x20655 | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Westmere | |||||||||||
Platform | Calpella | |||||||||||
Chipset | Ibex Peak | |||||||||||
Core Name | Arrandale | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 37 | |||||||||||
Core Stepping | K0, C2 | |||||||||||
Process | 32 nm | |||||||||||
Transistors | 382,000,000 | |||||||||||
Technology | CMOS | |||||||||||
Die | 81 mm² | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 2 | |||||||||||
Threads | 4 | |||||||||||
Max Memory | 8 GiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 1-Way (Uniprocessor) | |||||||||||
Electrical | ||||||||||||
TDP | 35 W | |||||||||||
Tjunction | 0 °C – 105 °C | |||||||||||
Tstorage | -25 °C – 125 °C | |||||||||||
Packaging | ||||||||||||
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Core i5-540M is a 64-bit x86 dual-core mobile microprocessor introduced by Intel in 2010. This processor, which is based on the Westmere microarchitecture (Arrandale core), is manufactured on a 32 nm process. This MPU operates at a base frequency of 2.53 GHz with a Turbo Boost frequency of 3.07 GHz and a TDP of 35 W. This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 766.00 MHz.
Cache[edit]
- Main article: Westmere § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Core i5-540M - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-540M - Intel#package + and Core i5-540M - Intel#io + |
base frequency | 2,533.33 MHz (2.533 GHz, 2,533,330 kHz) + |
bus links | 1 + |
bus rate | 2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) + |
bus type | DMI 1.0 + |
chipset | Ibex Peak + |
clock multiplier | 19 + |
core count | 2 + |
core family | 6 + |
core model | 37 + |
core name | Arrandale + |
core stepping | K0 + and C2 + |
cpuid | 0x20655 + |
designer | Intel + |
device id | 0x0046 + |
die area | 81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) + |
family | Core i5 + |
first announced | January 7, 2010 + |
first launched | January 7, 2010 + |
full page name | intel/core i5/i5-540m + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Flex Memory Access + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 1 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics (Ironlake) + |
integrated gpu base frequency | 500 MHz (0.5 GHz, 500,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 766 MHz (0.766 GHz, 766,000 KHz) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
ldate | January 7, 2010 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max memory bandwidth | 15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Westmere + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i5-540M + |
name | Intel Core i5-540M + |
package | rPGA-988A + and BGA-1288 + |
part number | BX80617I5540M +, CP80617004116AD + and CN80617004116AD + |
platform | Calpella + |
process | 32 nm (0.032 μm, 3.2e-5 mm) + |
release price | $ 257.00 (€ 231.30, £ 208.17, ¥ 26,555.81) + |
s-spec | SLBPG +, SLBPF +, SLC2D + and SLBTV + |
series | i5-500 + |
smp max ways | 1 + |
supported memory type | DDR3-1066 + |
tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
technology | CMOS + |
thread count | 4 + |
transistor count | 382,000,000 + |
turbo frequency (1 core) | 3,066.66 MHz (3.067 GHz, 3,066,660 kHz) + |
turbo frequency (2 cores) | 2,799.99 MHz (2.8 GHz, 2,799,990 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |