Difference between revisions of "intel/microarchitectures/whiskey lake"

	Edit Values
	Whiskey Lake µarch
	General Info
Arch Type	CPU
Designer	Intel
Manufacturer	Intel
Introduction	Q4, 2018
Process	14 nm++
Core Configs	4
	Pipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	14-19
Decode	5-way
	Instructions
ISA	x86-64
Extensions	MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX
	Cache
L1I Cache	32 KiB/core; 8-way set associative
L1D Cache	32 KiB/core; 8-way set associative
L2 Cache	256 KiB/core; 4-way set associative
L3 Cache	2 MiB/core; Up to 16-way set associative
	Cores
Core Names	Whiskey Lake U
	Succession
	Kaby Lake Comet Lake
	Contemporary
	Coffee Lake; Amber Lake; Cannon Lake

Latest revision as of 02:47, 9 January 2020

Whiskey Lake (WHL) is a microarchitecture designed by Intel as a successor to Kaby Lake for ultra-low power mobile devices, launched concurrently with Coffee Lake and Amber Lake.

Codenames[edit]

Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Core	Abbrev	Description	Graphics	Target
Whiskey Lake U	WHL-U	Ultra-low power	GT2	Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room

Brands[edit]

This section is empty; you can help add the missing info by editing this page.

Release Dates[edit]

Whiskey Lake processors are expected to be introduced in the summer of 2018.

Technology[edit]

Whiskey Lake is fabricated on 3rd generation improved 14+++ process.

Compatibility[edit]

This section is empty; you can help add the missing info by editing this page.

Compiler support[edit]

Compiler	Arch-Specific	Arch-Favorable
ICC	`-march=skylake`	`-mtune=skylake`
GCC	`-march=skylake`	`-mtune=skylake`
LLVM	`-march=skylake`	`-mtune=skylake`
Visual Studio	`/arch:AVX2`	`/tune:skylake`

CPUID[edit]

Core	Extended Family	Family	Extended Model	Model	Stepping
U
	0	0x6	0x8	0xE	0xB
	Family 6 Model 142 Stepping 11
	0	0x6	0x8	0xE	0xC
	Family 6 Model 142 Stepping 12

Meltdown and L1TF are fixed in hardware starting with stepping 11. Stepping 12 adds hardware support for mitigation of Branch Target Injection (Spectre V2) and Speculative Store Bypass.

Architecture[edit]

Key changes from Kaby Lake[edit]

Speculative execution fixes - see https://www.intel.com/content/www/us/en/architecture-and-technology/engineering-new-protections-into-hardware.html

Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

Overview[edit]

This section is empty; you can help add the missing info by editing this page.

All Whiskey Lake Chips[edit]

	List of Whiskey Lake-based Processors
	Main processor										Integrated Graphics
Model	Launched	Price	Family	Cores	Threads	L3$	TDP	Frequency	Turbo	Max Memory	Name	Frequency	Turbo
4205U	January 2019	$ 107.00 € 96.30 £ 86.67 ¥ 11,056.31	Celeron	2	2	2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	1.8 GHz 1,800 MHz 1,800,000 kHz		32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 610	300 MHz 0.3 GHz 300,000 KHz	900 MHz 0.9 GHz 900,000 KHz
4305U	16 April 2019	$ 107.00 € 96.30 £ 86.67 ¥ 11,056.31	Celeron	2	2	2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	2.2 GHz 2,200 MHz 2,200,000 kHz		32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 610	300 MHz 0.3 GHz 300,000 KHz	900 MHz 0.9 GHz 900,000 KHz
i3-8145U	28 August 2018	$ 281.00 € 252.90 £ 227.61 ¥ 29,035.73	Core i3	2	4	4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	2.1 GHz 2,100 MHz 2,100,000 kHz	3.9 GHz 3,900 MHz 3,900,000 kHz	32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 620	300 MHz 0.3 GHz 300,000 KHz	1,000 MHz 1 GHz 1,000,000 KHz
i5-8265U	28 August 2018	$ 297.00 € 267.30 £ 240.57 ¥ 30,689.01	Core i5	4	8	6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	1.6 GHz 1,600 MHz 1,600,000 kHz	3.9 GHz 3,900 MHz 3,900,000 kHz	32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 620	300 MHz 0.3 GHz 300,000 KHz	1,100 MHz 1.1 GHz 1,100,000 KHz
i5-8365U	16 April 2019	$ 297.00 € 267.30 £ 240.57 ¥ 30,689.01	Core i5	4	8	6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	1.6 GHz 1,600 MHz 1,600,000 kHz	4.1 GHz 4,100 MHz 4,100,000 kHz	32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 620	300 MHz 0.3 GHz 300,000 KHz	1,100 MHz 1.1 GHz 1,100,000 KHz
i7-8665U	16 April 2019	$ 409.00 € 368.10 £ 331.29 ¥ 42,261.97	Core i7	4	8	8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	1.9 GHz 1,900 MHz 1,900,000 kHz	4.8 GHz 4,800 MHz 4,800,000 kHz	32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 620	300 MHz 0.3 GHz 300,000 KHz	1,150 MHz 1.15 GHz 1,150,000 KHz
5405U	January 2019	$ 161.00 € 144.90 £ 130.41 ¥ 16,636.13	Pentium Pentium Gold	2	4	2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB	15 W 15,000 mW 0.0201 hp 0.015 kW	2.3 GHz 2,300 MHz 2,300,000 kHz		32 GiB 32,768 MiB 33,554,432 KiB 34,359,738,368 B 0.0313 TiB	UHD Graphics 610	300 MHz 0.3 GHz 300,000 KHz	950 MHz 0.95 GHz 950,000 KHz
Count: 7

@@ Line 5: / Line 5: @@
 |designer=Intel
 |manufacturer=Intel
-|introduction=July, 2018
+|introduction=Q4, 2018
-|process=14 nm
+|process=14 nm++
 |cores=4
 |oooe=Yes
@@ Line 58: / Line 58: @@
 |l3 desc=Up to 16-way set associative
 |core name=Whiskey Lake U
-|predecessor=Coffee Lake
+|predecessor=Kaby Lake
-|predecessor link=intel/microarchitectures/coffee lake
+|predecessor link=intel/microarchitectures/kaby lake
-|successor=Icelake
+|successor=Comet Lake
-|successor link=intel/microarchitectures/icelake
+|successor link=intel/microarchitectures/comet lake
-|contemporary=Cannon Lake
+|contemporary=Coffee Lake
-|contemporary link=intel/microarchitectures/cannon lake
+|contemporary link=intel/microarchitectures/coffee lake
+|contemporary 2=Amber Lake
+|contemporary 2 link=intel/microarchitectures/amber lake
+|contemporary 3=Cannon Lake
+|contemporary 3 link=intel/microarchitectures/cannon lake
 }}
-'''Whiskey Lake''' ('''WHL''') is a [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Coffee Lake}} for mobile devices. Whiskey Lake is expected to launch in the third quarter of [[2018]] and is manufactured on Intel's mature [[14 nm process]].
+'''Whiskey Lake''' ('''WHL''') is a [[microarchitecture]] designed by [[Intel]] as a successor to {{\\|Kaby Lake}} for ultra-low power mobile devices, launched concurrently with {{\\|Coffee Lake}} and {{\\|Amber Lake}}.
 == Codenames ==
+{{future information}}
 {| class="wikitable"
 |-
@@ Line 82: / Line 89: @@
 == Technology ==
-Whiskey Lake will be fabricated on "14nm+++", Intel's 4th generation improved [[14 nm process]].
+Whiskey Lake is fabricated on 3rd generation improved [[14 nm process|14+++ process]].
 == Compatibility ==
@@ Line 102: / Line 109: @@
 === CPUID ===
-{| class="wikitable tc1 tc2 tc3 tc4"
+{| class="wikitable tc1 tc2 tc3 tc4 tc5"
-! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model
+! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model !! Stepping
 |-
-| rowspan="2" | {{intel|Coffee Lake U|U|l=core}} || 0 || 0x6 || 0x9 || 0xE
+| rowspan="5" | {{intel|Whiskey Lake U|U|l=core}}
 |-
-| colspan="4" | Family 6 Model 158
+|| 0 || 0x6 || 0x8 || 0xE || 0xB
 |-
-| rowspan="2" | {{intel|Coffee Lake S|S|l=core}}/{{intel|Coffee Lake H|H|l=core}} || 0 || 0x6 || 0x? || 0x?
+| colspan="5" | Family 6 Model 142 Stepping 11
 |-
-| colspan="4" | Family 6 Model ???
+|| 0 || 0x6 || 0x8 || 0xE || 0xC
+|-
+| colspan="5" | Family 6 Model 142 Stepping 12
 |}
+Meltdown and L1TF are fixed in hardware starting with stepping 11. Stepping 12 adds hardware support for mitigation of Branch Target Injection (Spectre V2) and Speculative Store Bypass.
 == Architecture ==
-=== Key changes from {{\\|Coffee Lake}}===
+=== Key changes from {{\\|Kaby Lake}}===
-* Enhanced "14nm+++" process results in higher turbo frequencies
+Speculative execution fixes - see https://www.intel.com/content/www/us/en/architecture-and-technology/engineering-new-protections-into-hardware.html
+{{future information}}
+<!--
+* Package and pin-compatible with {{\\|Cannon Lake}} {{intel|Cannon Lake U|U|l=core}}
+* Die from {{intel|Coffee Lake U|l=core}} and {{intel|Cannon Point|l=chipset}} PCH
+-->
 == Overview ==
 {{empty section}}
+== All Whiskey Lake Chips ==
+<!-- NOTE:
+           This table is generated automatically from the data in the actual articles.
+           If a microprocessor is missing from the list, an appropriate article for it needs to be
+           created and tagged accordingly.
+           Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
+-->
+{{comp table start}}
+<table class="comptable sortable tc4">
+{{comp table header|main|13:List of Whiskey Lake-based Processors}}
+{{comp table header|main|10:Main processor|4:Integrated Graphics}}
+{{comp table header 1|cols=Launched, Price, Family, %Cores, %Threads, %L3$, TDP, %Frequency, %Turbo, %Max Memory, Name, %Frequency, %Turbo}}
+{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Whiskey Lake]]
+ |?full page name
+ |?model number
+ |?first launched
+ |?release price
+ |?microprocessor family
+ |?core count
+ |?thread count
+ |?l3$ size
+ |?tdp
+ |?base frequency#GHz
+ |?turbo frequency (1 core)#GHz
+ |?max memory#GiB
+ |?integrated gpu
+ |?integrated gpu base frequency
+ |?integrated gpu max frequency
+ |format=template
+ |template=proc table 3
+ |searchlabel=
+ |sort=microprocessor family, model number
+ |order=asc,asc
+ |userparam=15
+ |mainlabel=-
+ |limit=100
+}}
+{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microarchitecture::Whiskey Lake]]}}
+</table>
+{{comp table end}}

codename	Whiskey Lake +
core count	4 +
designer	Intel +
first launched	April 2018 +
full page name	intel/microarchitectures/whiskey lake +
instance of	microarchitecture +
instruction set architecture	x86-64 +
manufacturer	Intel +
microarchitecture type	CPU +
name	Whiskey Lake +
pipeline stages (max)	19 +
pipeline stages (min)	14 +

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Latest revision as of 02:47, 9 January 2020

Contents

Codenames[edit]

Brands[edit]

Release Dates[edit]

Technology[edit]

Compatibility[edit]

Compiler support[edit]

CPUID[edit]

Architecture[edit]

Key changes from Kaby Lake[edit]

Overview[edit]

All Whiskey Lake Chips[edit]