From WikiChip
Difference between revisions of "intel/celeron/n3450"
m (Bot: corrected mem) |
(Appolo lake chips support sse4.1 sse4.2) |
||
(5 intermediate revisions by one other user not shown) | |||
Line 1: | Line 1: | ||
{{intel title|Celeron N3450}} | {{intel title|Celeron N3450}} | ||
− | {{ | + | {{chip |
| name = Celeron N3450 | | name = Celeron N3450 | ||
| no image = Yes | | no image = Yes | ||
Line 7: | Line 7: | ||
| model number = N3450 | | model number = N3450 | ||
| part number = FH8066802979803 | | part number = FH8066802979803 | ||
− | | part number | + | | part number 2 = FH8066802979803 |
− | |||
| part number 3 = | | part number 3 = | ||
+ | | part number 4 = | ||
| market = Mobile | | market = Mobile | ||
| first announced = August 30, 2016 | | first announced = August 30, 2016 | ||
Line 48: | Line 48: | ||
| max memory = 8 GiB | | max memory = 8 GiB | ||
− | + | ||
| power = | | power = | ||
| v core = | | v core = | ||
Line 173: | Line 173: | ||
== Expansions == | == Expansions == | ||
− | {{ | + | {{expansions |
| pcie revision = 2.0 | | pcie revision = 2.0 | ||
| pcie lanes = 6 | | pcie lanes = 6 | ||
Line 197: | Line 197: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
− | | | + | |real=No |
− | | | + | |protected=No |
− | | | + | |smm=No |
− | | | + | |fpu=No |
− | | | + | |x8616=No |
− | | | + | |x8632=No |
− | | | + | |x8664=No |
− | | | + | |nx=Yes |
− | | | + | |mmx=Yes |
− | | | + | |emmx=No |
− | | | + | |sse=Yes |
− | | | + | |sse2=Yes |
− | | | + | |sse3=Yes |
− | | | + | |ssse3=Yes |
− | | | + | |sse41=Yes |
− | | | + | |sse42=Yes |
− | | | + | |sse4a=No |
− | | | + | |sse_gfni=No |
− | | | + | |avx=No |
− | | | + | |avx_gfni=No |
− | | | + | |avx2=No |
− | | | + | |avx512f=No |
− | | | + | |avx512cd=No |
− | | | + | |avx512er=No |
− | | | + | |avx512pf=No |
− | | | + | |avx512bw=No |
− | | | + | |avx512dq=No |
− | | | + | |avx512vl=No |
− | | | + | |avx512ifma=No |
− | | | + | |avx512vbmi=No |
− | | | + | |avx5124fmaps=No |
− | | | + | |avx512vnni=No |
− | | | + | |avx5124vnniw=No |
− | | | + | |avx512vpopcntdq=No |
+ | |avx512gfni=No | ||
+ | |avx512vaes=No | ||
+ | |avx512vbmi2=No | ||
+ | |avx512bitalg=No | ||
+ | |avx512vpclmulqdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=No | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |bfloat16=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |tvb=No | ||
+ | |bpt=Yes | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=Yes | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=No | ||
+ | |vtd=No | ||
+ | |ept=Yes | ||
+ | |mpx=No | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=No | ||
+ | |dlboost=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | |xfr2=No | ||
+ | |mxfr=No | ||
+ | |amdpb=No | ||
+ | |amdpb2=No | ||
+ | |amdpbod=No | ||
+ | |em64t=Yes | ||
+ | |vt-x=Yes | ||
+ | |vt-d=Yes | ||
+ | |sse4_1=Yes | ||
+ | |sse4_2=Yes | ||
+ | |pclmul=Yes | ||
+ | |secure key=Yes | ||
}} | }} |
Latest revision as of 22:15, 25 August 2019
Edit Values | |
Celeron N3450 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | N3450 |
Part Number | FH8066802979803, FH8066802979803 |
S-Spec | SR2YA, SR2Z6 |
Market | Mobile |
Introduction | August 30, 2016 (announced) August 30, 2016 (launched) |
Release Price | $107.00 |
Shop | Amazon |
General Specs | |
Family | Celeron |
Series | N Series |
Locked | Yes |
Frequency | 1100 MHz |
Turbo Frequency | Yes |
Turbo Frequency | 2200 MHz (1 core) |
Clock multiplier | 11 |
Microarchitecture | |
Microarchitecture | Goldmont |
Core Name | Apollo Lake |
Core Stepping | B0, B1 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 4 |
Threads | 4 |
Max Memory | 8 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
SDP | 4 W |
TDP | 6 W |
Tjunction | 0 °C – 105 °C |
Tstorage | -25 °C – 125 °C |
Celeron N3450 is a quad-core 64-bit x86 mobile microprocessor introduced by Intel in 2016. The processor is based on Goldmont microarchitecture and is manufactured on a 14 nm process. The chip operates at 1.1 GHz with burst frequency of 2.2 GHz and has a TDP of 6 W (SDP of 4 W). This MPU incorporates Intel's HD Graphics 500 GPU operating at 200 MHz with a burst frequency of 700 MHz.
Cache[edit]
- Main article: Goldmont § Cache
Cache Info [Edit Values] | ||
L1I$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core) |
L1D$ | 96 KiB 98,304 B 0.0938 MiB |
4x24 KiB 6-way set associative (per core) |
L2$ | 2 MiB 2,048 KiB 2,097,152 B 0.00195 GiB |
2x1 MiB 16-way set associative (per 2 cores) |
L3$ | 0 KiB 0 MiB 0 B 0 GiB |
No L3$ |
Memory controller[edit]
Integrated Memory Controller | |
Type | LPDDR3-1333, LPDDR3-1600, LPDDR3-2400, DDR3L-1333, DDR3L-1600, DDR3L-1867, LPDDR4-1600, LPDDR4-2133, LPDDR4-2400 |
Controllers | 1 |
Channels | 2 |
ECC Support | No |
Bandwidth (single) | 19,200 MB/s |
Bandwidth (dual) | 38,400 MB/s |
Max memory | 8,192 MB |
Graphics[edit]
Integrated Graphic Information | |
GPU | HD Graphics 500 |
Device ID | 0x5A85 |
Execution Units | 12 |
Displays | 3 |
Frequency | 200 MHz 0.2 GHz
200,000 KHz |
Max frequency | 700 MHz 0.7 GHz
700,000 KHz |
Max memory | 8 GiB 8,192 MiB
8,388,608 KiB 8,589,934,592 B |
Output | DisplayPort, Embedded DisplayPort, HDMI, DSI |
DirectX | 12 |
OpenGL | 4.3 |
OpenCL | 1.2 |
OpenGL ES | 3.0 |
HDMI | 1.4b |
DP | 1.2 |
eDP | 1.3 |
Max HDMI Res | 3840x2160 @30 Hz |
Max DSI Res | 2560x1600 @60 Hz |
Max DP Res | 4096x2160 @60 Hz |
Max eDP Res | 3840x2160 @60 Hz |
Intel Quick Sync Video | |
Intel Clear Video |
- Video decode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, MPEG2, VC-1, WMV9, JPEG/MJPEG.
- Video encode hardware acceleration including support for HEVC (H.265), H.264, MVC, VP8, VP9, JPEG/MJPEG.
Expansions[edit]
Expansion Options
|
||||||||||||||||||||||||
|
- 2x USB 2.0 ports
- 6x USB 3.0 ports
- 1x USB Dual Role
- 1x Dedicated Port
- 3x multiplexed with PCIe 2.0
- 1x multiplexed with SATA 3.0
Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
|
||||||||||
|
Facts about "Celeron N3450 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron N3450 - Intel#io + |
base frequency | 1,100 MHz (1.1 GHz, 1,100,000 kHz) + |
clock multiplier | 11 + |
core count | 4 + |
core name | Apollo Lake + |
core stepping | B0 + and B1 + |
designer | Intel + |
device id | 0x5A85 + |
family | Celeron + |
first announced | August 30, 2016 + |
first launched | August 30, 2016 + |
full page name | intel/celeron/n3450 + |
has extended page tables support | true + |
has feature | integrated gpu +, Advanced Encryption Standard Instruction Set Extension +, Burst Performance Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology + and Extended Page Tables + |
has intel burst performance technology | true + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 500 + |
integrated gpu base frequency | 200 MHz (0.2 GHz, 200,000 KHz) + |
integrated gpu max frequency | 700 MHz (0.7 GHz, 700,000 KHz) + |
integrated gpu max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 96 KiB (98,304 B, 0.0938 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
l3$ description | No L3$ + |
l3$ size | 0 MiB (0 KiB, 0 B, 0 GiB) + |
ldate | August 30, 2016 + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) + |
max pcie lanes | 6 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Goldmont + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | N3450 + |
name | Celeron N3450 + |
part number | FH8066802979803 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) + |
s-spec | SR2YA + and SR2Z6 + |
sdp | 4 W (4,000 mW, 0.00536 hp, 0.004 kW) + |
series | N Series + |
smp max ways | 1 + |
tdp | 6 W (6,000 mW, 0.00805 hp, 0.006 kW) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 2,200 MHz (2.2 GHz, 2,200,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |