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Difference between revisions of "intel/atom/c3958"
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{{intel title|Atom C3958}} | {{intel title|Atom C3958}} | ||
− | {{ | + | {{chip |
|name=Atom C3958 | |name=Atom C3958 | ||
− | | | + | |image=denverton (front).png |
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
Line 23: | Line 23: | ||
|core name=Denverton | |core name=Denverton | ||
|core family=6 | |core family=6 | ||
+ | |core model=95 | ||
|core stepping=B1 | |core stepping=B1 | ||
|process=14 nm | |process=14 nm | ||
Line 40: | Line 41: | ||
|package module 1={{packages/intel/fcbga-1310}} | |package module 1={{packages/intel/fcbga-1310}} | ||
}} | }} | ||
− | '''Atom C3958''' is a {{arch|64}} [[hexadeca-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3958, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 2 GHz with a [[TDP]] of 31 W. The C3958 supports up to | + | '''Atom C3958''' is a {{arch|64}} [[hexadeca-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3958, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 2 GHz with a [[TDP]] of 31 W. The C3958 supports up to 256 GiB of dual-channel DDR4-2400 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Network and Enterprise Storage SKUs]] and come with integrated {{intel|QuickAssist Technology}}. |
== Cache == | == Cache == | ||
Line 72: | Line 73: | ||
|bandwidth dchan=35.76 GiB/s | |bandwidth dchan=35.76 GiB/s | ||
}} | }} | ||
+ | |||
+ | == Expansions == | ||
+ | This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following: | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=16 | ||
+ | |pcie config=x8 | ||
+ | |pcie config 2=x4 | ||
+ | |pcie config 3=x2 | ||
+ | |pcie config 4=x1 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=USB | ||
+ | |usb revision=3.0 | ||
+ | |usb ports=8 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=SATA | ||
+ | |sata revision=3.0 | ||
+ | |sata ports=16 | ||
+ | }} | ||
+ | {{expansions entry | ||
+ | |type=HSIO | ||
+ | |hsio lanes=20 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Networking == | ||
+ | {{network | ||
+ | |eth opts=Yes | ||
+ | |10ge=Yes | ||
+ | |10ge ports=4 | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=No | ||
+ | |avx2=No | ||
+ | |avx512f=No | ||
+ | |avx512cd=No | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=No | ||
+ | |avx512dq=No | ||
+ | |avx512vl=No | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |abm=No | ||
+ | |tbm=No | ||
+ | |bmi1=No | ||
+ | |bmi2=No | ||
+ | |fma3=No | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=Yes | ||
+ | |xop=No | ||
+ | |adx=No | ||
+ | |clmul=No | ||
+ | |f16c=No | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=No | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=No | ||
+ | |tsx=No | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=Yes | ||
+ | |sgx=No | ||
+ | |securekey=No | ||
+ | |osguard=No | ||
+ | |intqat=Yes | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
+ | }} | ||
+ | |||
+ | * Intel's Integrated {{intel|QuickAssist Technology}} supports a rate of up to 20 Gbps. |
Latest revision as of 00:29, 15 August 2019
Edit Values | |||||||||||
Atom C3958 | |||||||||||
General Info | |||||||||||
Designer | Intel | ||||||||||
Manufacturer | Intel | ||||||||||
Model Number | C3958 | ||||||||||
Part Number | HW8076502444202 | ||||||||||
S-Spec | SR381 | ||||||||||
Market | Server, Embedded | ||||||||||
Introduction | August 15, 2017 (announced) August 15, 2017 (launched) | ||||||||||
Release Price | $449.00 | ||||||||||
Shop | Amazon | ||||||||||
General Specs | |||||||||||
Family | Atom | ||||||||||
Series | 3000 | ||||||||||
Locked | Yes | ||||||||||
Frequency | 2,000 MHz | ||||||||||
Clock multiplier | 20 | ||||||||||
Microarchitecture | |||||||||||
ISA | x86-64 (x86) | ||||||||||
Microarchitecture | Goldmont | ||||||||||
Core Name | Denverton | ||||||||||
Core Family | 6 | ||||||||||
Core Model | 95 | ||||||||||
Core Stepping | B1 | ||||||||||
Process | 14 nm | ||||||||||
Technology | CMOS | ||||||||||
Word Size | 64 bit | ||||||||||
Cores | 16 | ||||||||||
Threads | 16 | ||||||||||
Max Memory | 256 GiB | ||||||||||
Multiprocessing | |||||||||||
Max SMP | 1-Way (Uniprocessor) | ||||||||||
Electrical | |||||||||||
TDP | 31 W | ||||||||||
Tjunction | 0 °C – 100 °C | ||||||||||
Tcase | 0 °C – 83 °C | ||||||||||
Tstorage | -25 °C – 125 °C | ||||||||||
Packaging | |||||||||||
|
Atom C3958 is a 64-bit hexadeca-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3958, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 2 GHz with a TDP of 31 W. The C3958 supports up to 256 GiB of dual-channel DDR4-2400 ECC memory. This model is part of Denverton's Network and Enterprise Storage SKUs and come with integrated QuickAssist Technology.
Cache[edit]
- Main article: Goldmont § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
This chip incorporates 20 high-speed I/O (HSIO) lanes that may be configured as any combination of the following:
Expansion Options |
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Networking[edit]
Networking
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Features[edit]
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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- Intel's Integrated QuickAssist Technology supports a rate of up to 20 Gbps.
Facts about "Atom C3958 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom C3958 - Intel#package + and Atom C3958 - Intel#pcie + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
clock multiplier | 20 + |
core count | 16 + |
core family | 6 + |
core model | 95 + |
core name | Denverton + |
core stepping | B1 + |
designer | Intel + |
family | Atom + |
first announced | August 15, 2017 + |
first launched | August 15, 2017 + |
full page name | intel/atom/c3958 + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions + and Integrated QuickAssist Technology + |
has integrated intel quickassist technology | true + |
has intel enhanced speedstep technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 896 KiB (917,504 B, 0.875 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
ldate | August 15, 2017 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max case temperature | 356.15 K (83 °C, 181.4 °F, 641.07 °R) + |
max cpu count | 1 + |
max hsio lanes | 20 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 262,144 MiB (268,435,456 KiB, 274,877,906,944 B, 256 GiB, 0.25 TiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max sata ports | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
max usb ports | 8 + |
microarchitecture | Goldmont + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | C3958 + |
name | Atom C3958 + |
package | FCBGA-1310 + |
part number | HW8076502444202 + |
part of | Network and Enterprise Storage SKUs + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 449.00 (€ 404.10, £ 363.69, ¥ 46,395.17) + |
s-spec | SR381 + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR3L-1600 + and DDR4-2400 + |
tdp | 31 W (31,000 mW, 0.0416 hp, 0.031 kW) + |
technology | CMOS + |
thread count | 16 + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |