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Difference between revisions of "Talk:amd/cores/picasso"
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(PCIe lane count clarification needed.) |
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+ | Is it 12 PCIe lanes (1x8 for GPU + 1x4 for storage) or 20 PCIe lanes (1x16 for GPU + 1x4 for storage) as does individual entries of the series insist? |
Revision as of 05:43, 4 August 2019
This is the discussion page for the amd/cores/picasso page. |
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Is it 12 PCIe lanes (1x8 for GPU + 1x4 for storage) or 20 PCIe lanes (1x16 for GPU + 1x4 for storage) as does individual entries of the series insist?