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{{mediatek title|Helio P20 (MT6757)}}
 
{{mediatek title|Helio P20 (MT6757)}}
{{mpu
+
{{chip
| future              = Yes
+
|name=Helio P20
| name               = MediaTek Helio P20
+
|no image=Yes
| no image           = yes
+
|designer=MediaTek
| image              =
+
|designer 2=ARM Holdings
| image size          =
+
|manufacturer=TSMC
| caption            =  
+
|model number=P20
| designer           = MediaTek
+
|part number=MT6757
| designer 2         = ARM Holdings
+
|part number 2=MTK6757
| manufacturer       = TSMC
+
|market=Mobile
| model number       = Helio P20
+
|market 2=Embedded
| part number         = MT6757
+
|first announced=September 22, 2016
| part number 2       = MTK6757
+
|first launched=November, 2016
| market             = Mobile
+
|family=Helio
| market 2           = Embedded
+
|series=Helio P
| first announced     = September 22, 2016
+
|frequency=2,300 MHz
| first launched     = 2017
+
|bus type=AMBA 4 AXI
| last order          =
+
|isa=ARMv8
| last shipment      =
+
|isa family=ARM
| release price      =
+
|microarch=Cortex-A53
 
+
|core name=Cortex-A53
| family             = Helio
+
|process=16 nm
| series             = Helio P
+
|technology=CMOS
| locked              =
+
|word size=64 bit
| frequency           = 2,300 MHz
+
|core count=8
| frequency 2        =
+
|thread count=8
| bus type           = AMBA 4 AXI
+
|max cpus=1
| bus speed          =  
+
|max memory=6 GiB
| bus rate            =
 
| bus links          =
 
| clock multiplier    =
 
 
 
| isa family         = ARM
 
| isa                = ARMv8
 
| microarch           = Cortex-A53
 
| platform            =
 
| chipset            =
 
| core name           = Cortex-A53
 
| core family        =
 
| core model          =
 
| core stepping      =
 
| process             = 16 nm
 
| transistors        =
 
| technology         = CMOS
 
| die area            = <!-- XX mm² -->
 
| die width          =
 
| die length          =
 
| word size           = 64 bit
 
| core count         = 8
 
| thread count       = 8
 
| max cpus           = 1
 
| max memory         = 4 GiB
 
 
 
| electrical          =
 
| power              =
 
| v core              =
 
| v core tolerance    =
 
| v io                =
 
| v io 2              =
 
| v io 3              =
 
| sdp                =
 
| tdp                =
 
| tdp typical        =
 
| ctdp down          =
 
| ctdp down frequency =
 
| ctdp up            =
 
| ctdp up frequency  =
 
| temp min            =
 
| temp max            =
 
| tjunc min          =
 
| tjunc max          =
 
| tcase min          =
 
| tcase max          =
 
| tstorage min        = <!-- °C -->
 
| tstorage max        =
 
| tambient min        =
 
| tambient max        =
 
 
 
| packaging          =
 
| package 0          =
 
| package 0 type      =
 
| package 0 pins      =
 
| package 0 pitch    =
 
| package 0 width    =
 
| package 0 length    =
 
| package 0 height    =
 
 
}}
 
}}
'''Helio P20''' ('''MT6757''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and set to be launched in [[2017]]. This SoC, which incorporates eight {{armh|Cortex-A53|l=arch}} cores and is manufactured on [[TSMC]]'s [[16 nm process]], operates at up to 2.3 GHz and supports dual-channel LPDDR4-1600. This chip incorporates the {{imgtec|Mali-T880}} [[IGP]] operating at 900  MHz. This SoC has a modem supporting [[LTE]] User Equipment (UE) category 6.
+
'''Helio P20''' ('''MT6757''') is a {{arch|64}} [[octa-core]] [[ARM]] [[LTE]] system on a chip designed by [[MediaTek]] and launched in late [[2016]]. This SoC, which incorporates eight {{armh|Cortex-A53|l=arch}} cores and is manufactured on [[TSMC]]'s [[16 nm process]], operates at up to 2.3 GHz and supports up to 6 GiB of dual-channel LPDDR4X-3200 memory. This chip incorporates the {{imgtec|Mali-T880}} [[IGP]] operating at 900  MHz. This SoC has a modem supporting [[LTE]] User Equipment (UE) category 6.
  
 
 
{{unknown features}}
 
 
== Cache ==
 
== Cache ==
 
{{main|arm holdings/microarchitectures/cortex-a53#Memory_Hierarchy|l1=Cortex-A53 § Cache}}
 
{{main|arm holdings/microarchitectures/cortex-a53#Memory_Hierarchy|l1=Cortex-A53 § Cache}}
 
{{cache size
 
{{cache size
|l1 cache = 512 KiB
+
|l1 cache=512 KiB
 
|l1i cache=256 KiB
 
|l1i cache=256 KiB
 
|l1i break=8x32 KiB
 
|l1i break=8x32 KiB
Line 109: Line 48:
 
== Memory controller ==
 
== Memory controller ==
 
{{memory controller
 
{{memory controller
|type=LPDDR3-933
+
|type=LPDDR4X-3200
|type 2=LPDDR4-1600
 
 
|ecc=No
 
|ecc=No
|max mem=4 GiB
+
|max mem=6 GiB
 
|controllers=1
 
|controllers=1
 
|channels=2
 
|channels=2
 +
|width=32 bit
 
|max bandwidth=23.84 GiB/s
 
|max bandwidth=23.84 GiB/s
 
|bandwidth schan=11.92 GiB/s
 
|bandwidth schan=11.92 GiB/s
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== Utilizing devices ==
 
== Utilizing devices ==
<!--
+
* [[used by::Alcatel Idol 5S]]
* [[used by::xxxxxxxxxxxxxxxx]]
+
* [[used by::Blackview BV8000 PRO]]
* [[used by::xxxxxxxxxxxxxxxx]]
+
* [[used by::Blackview BV9000 PRO]]
-->
+
* [[used by::CAT S41]]
 
+
* [[used by::Elephone P20]]
 +
* [[used by::Elephone Z1]]
 +
* [[used by::InnJoo Pro 2]]
 +
* [[used by::Meizu E2]]
 +
* [[used by::Meizu X]]
 +
* [[used by::Maze Alpha X]]
 +
* [[used by::Sony Xperia XA1]]
 +
* [[used by::Sony Xperia XA1 Plus]]
 +
* [[used by::Sony Xperia XA1 Ultra]]
 +
* [[used by::UMiDIGI S]]
 +
* [[used by::UMiDIGI Z1]]
 +
* [[used by::UMiDIGI Z1 Pro]]
 +
* [[used by::UMi Plus Extreme]]
 +
* [[used by::Vernee MIX 2]]
 +
* [[used by::MEIIGOO M1]]
 +
* [[used by::Samsung On Max]]
 +
* [[used by::Maze Alpha]]
 +
* [[used by::Samsung J7 max]]
 +
* [[used by::Doogee S60]]
 +
* [[used by::Lenovo K8]]
 +
* [[used by::Samsung J7+]]
 +
* [[used by::Bluboo S1]]
 +
* [[used by::Gome K1]]
 +
* [[used by::Vargo VX3]]
  
{{expand list}}
+
{expand list}}

Latest revision as of 03:40, 23 June 2019

Edit Values
Helio P20
General Info
DesignerMediaTek,
ARM Holdings
ManufacturerTSMC
Model NumberP20
Part NumberMT6757,
MTK6757
MarketMobile, Embedded
IntroductionSeptember 22, 2016 (announced)
November, 2016 (launched)
General Specs
FamilyHelio
SeriesHelio P
Frequency2,300 MHz
Bus typeAMBA 4 AXI
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureCortex-A53
Core NameCortex-A53
Process16 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Max Memory6 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)

Helio P20 (MT6757) is a 64-bit octa-core ARM LTE system on a chip designed by MediaTek and launched in late 2016. This SoC, which incorporates eight Cortex-A53 cores and is manufactured on TSMC's 16 nm process, operates at up to 2.3 GHz and supports up to 6 GiB of dual-channel LPDDR4X-3200 memory. This chip incorporates the Mali-T880 IGP operating at 900 MHz. This SoC has a modem supporting LTE User Equipment (UE) category 6.

Cache[edit]

Main article: Cortex-A53 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
524,288 B
0.5 MiB
L1I$256 KiB
262,144 B
0.25 MiB
8x32 KiB2-way set associative 
L1D$256 KiB
262,144 B
0.25 MiB
8x32 KiB4-way set associative 

L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB16-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR4X-3200
Supports ECCNo
Max Mem6 GiB
Controllers1
Channels2
Width32 bit
Max Bandwidth23.84 GiB/s
24,412.16 MiB/s
25.598 GB/s
25,598.005 MB/s
0.0233 TiB/s
0.0256 TB/s
Bandwidth
Single 11.92 GiB/s
Double 23.84 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
USB
Revision2.0, 3.0
Ports8
UART

GP I/OYes


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-T880
DesignerARM Holdings
Execution Units2Max Displays2
Frequency900 MHz
0.9 GHz
900,000 KHz
OutputDSI

Max Resolution
DSI1920x1080

Standards
Direct3D11.2
OpenGL3.2
OpenCL1.2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0

Wireless[edit]

Antu network-wireless-connected-100.svgWireless Communications
Cellular
2G
CSD Yes
GSM Yes
GPRS Yes
EDGE Yes
3G
UMTS
TD-SCDMAYes
DC-HSDPAYes
HSUPAYes
4G
LTE Advanced
E-UTRANYes
UE Cat6

Image[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Video[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Audio[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Utilizing devices[edit]

  • Alcatel Idol 5S
  • Blackview BV8000 PRO
  • Blackview BV9000 PRO
  • CAT S41
  • Elephone P20
  • Elephone Z1
  • InnJoo Pro 2
  • Meizu E2
  • Meizu X
  • Maze Alpha X
  • Sony Xperia XA1
  • Sony Xperia XA1 Plus
  • Sony Xperia XA1 Ultra
  • UMiDIGI S
  • UMiDIGI Z1
  • UMiDIGI Z1 Pro
  • UMi Plus Extreme
  • Vernee MIX 2
  • MEIIGOO M1
  • Samsung On Max
  • Maze Alpha
  • Samsung J7 max
  • Doogee S60
  • Lenovo K8
  • Samsung J7+
  • Bluboo S1
  • Gome K1
  • Vargo VX3

{expand list}}

has 2g supporttrue +
has 3g supporttrue +
has 4g supporttrue +
has csd supporttrue +
has dc-hsdpa supporttrue +
has e-utran supporttrue +
has ecc memory supportfalse +
has edge supporttrue +
has gprs supporttrue +
has gsm supporttrue +
has hsupa supporttrue +
has lte advanced supporttrue +
has td-scdma supporttrue +
has umts supporttrue +
integrated gpuMali-T880 +
integrated gpu base frequency900 MHz (0.9 GHz, 900,000 KHz) +
integrated gpu designerARM Holdings +
integrated gpu execution units2 +
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description4-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description2-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
max memory bandwidth23.84 GiB/s (24,412.16 MiB/s, 25.598 GB/s, 25,598.005 MB/s, 0.0233 TiB/s, 0.0256 TB/s) +
max memory channels2 +
supported memory typeLPDDR3-933 + and LPDDR4-1600 +
user equipment category6 +