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Difference between revisions of "cavium/microarchitectures/thunderx1"
< cavium

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|l2 desc=16-way set associative
 
|l2 desc=16-way set associative
 
|successor=Vulcan
 
|successor=Vulcan
|successor link=cavium/microarchitecture/thunderx1
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|successor link=cavium/microarchitectures/vulcan
 
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The microarchitecture of the original custom-designed [[Cavium]] [[ThunderX]] processor might be called ThunderX1 for the purposes of this wiki.
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The microarchitecture of the original custom-designed [[Cavium]] [[cavium/thunderx|ThunderX]] processor might be called ThunderX1 for the purposes of this wiki. This microarchitecture is also the basis for the [[cavium/octeon_tx|Octeon TX]] family of processors.
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[https://www.anandtech.com/print/10353/investigating-cavium-thunderx-48-arm-cores]
 
[https://www.anandtech.com/print/10353/investigating-cavium-thunderx-48-arm-cores]
 
[https://www.nextplatform.com/2015/12/09/arm-servers-cavium-is-a-contender-with-thunderx/]
 
[https://www.nextplatform.com/2015/12/09/arm-servers-cavium-is-a-contender-with-thunderx/]

Latest revision as of 18:30, 1 February 2019

Edit Values
ThunderX1 µarch
General Info
Arch TypeCPU
DesignerCavium
ManufacturerGlobalFoundries
Introduction2014
Process28 nm
Core Configs24, 48
Pipeline
TypeSuperscalar, Superpipeline
Decode4?
Instructions
ISAARMv8.1
ExtensionsNEON, TrustZone
Cache
L1I Cache78 KiB/core
39-way set associative
L1D Cache32 KiB/core
32-way set associative
L2 Cache16 MiB/socket
16-way set associative
Succession

The microarchitecture of the original custom-designed Cavium ThunderX processor might be called ThunderX1 for the purposes of this wiki. This microarchitecture is also the basis for the Octeon TX family of processors.

[1] [2]

codenameThunderX1 +
core count24 + and 48 +
designerCavium +
first launched2014 +
full page namecavium/microarchitectures/thunderx1 +
instance ofmicroarchitecture +
instruction set architectureARMv8.1 +
manufacturerGlobalFoundries +
microarchitecture typeCPU +
nameThunderX1 +
process28 nm (0.028 μm, 2.8e-5 mm) +