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'''Cortex-A73''' (codename '''Artemis''') is the successor to the {{armh|Cortex-A72|l=arch}}, a low-power high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A73, which implemented the {{arm|ARMv8}} ISA, is the a performant core which is often combined with a number of lower power cores (e.g. {{\\|Cortex-A53}}) in a {{armh|big.LITTLE}} configuration to achieve better energy/performance.
 
'''Cortex-A73''' (codename '''Artemis''') is the successor to the {{armh|Cortex-A72|l=arch}}, a low-power high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the mobile market. This microarchitecture is designed as a synthesizable [[IP core]] and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A73, which implemented the {{arm|ARMv8}} ISA, is the a performant core which is often combined with a number of lower power cores (e.g. {{\\|Cortex-A53}}) in a {{armh|big.LITTLE}} configuration to achieve better energy/performance.
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== Compiler support ==
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{| class="wikitable"
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|-
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! Compiler !! Arch-Specific || Arch-Favorable
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|-
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| [[Arm Compiler]] || <code>-mcpu=cortex-a73</code> || <code>-mtune=cortex-a73</code>
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|-
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| [[GCC]] || <code>-mcpu=cortex-a73</code> || <code>-mtune=cortex-a73</code>
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|-
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| [[LLVM]] || <code>-mcpu=cortex-a73</code> || <code>-mtune=cortex-a73</code>
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|}
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If the Cortex-A73 is coupled with the {{\\|Cortex-A53}} in a [[big.LITTLE]] system, GCC also supports the following option:
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{| class="wikitable"
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|-
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! Compiler !! Tune
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|-
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| [[GCC]] || <code>-mtune=cortex-a73.cortex-a53</code>
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|}

Revision as of 13:47, 31 December 2018

Edit Values
Cortex-A73 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionMay 29, 2016
Instructions
ISAARMv8
Succession

Cortex-A73 (codename Artemis) is the successor to the Cortex-A72, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A73, which implemented the ARMv8 ISA, is the a performant core which is often combined with a number of lower power cores (e.g. Cortex-A53) in a big.LITTLE configuration to achieve better energy/performance.

Compiler support

Compiler Arch-Specific Arch-Favorable
Arm Compiler -mcpu=cortex-a73 -mtune=cortex-a73
GCC -mcpu=cortex-a73 -mtune=cortex-a73
LLVM -mcpu=cortex-a73 -mtune=cortex-a73

If the Cortex-A73 is coupled with the Cortex-A53 in a big.LITTLE system, GCC also supports the following option:

Compiler Tune
GCC -mtune=cortex-a73.cortex-a53
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Facts about "Cortex-A73 - Microarchitectures - ARM"
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codenameCortex-A73 +
designerARM Holdings +
first launchedMay 29, 2016 +
full page namearm holdings/microarchitectures/cortex-a73 +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A73 +