From WikiChip
Difference between revisions of "cavium/thunderx/cn8890"
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|pcie lanes=24 | |pcie lanes=24 | ||
|pcie config=x16 | |pcie config=x16 | ||
− | |pcie config | + | |pcie config 2=x8 |
− | |pcie config | + | |pcie config 3=x4 |
}} | }} | ||
{{expansions entry | {{expansions entry | ||
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</pre> | </pre> | ||
See [[arm/armv8#ARMv8_Extensions_and_Processor_Features|ARMv8 features]] for a description of flags. | See [[arm/armv8#ARMv8_Extensions_and_Processor_Features|ARMv8 features]] for a description of flags. | ||
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Latest revision as of 14:32, 4 December 2018
Edit Values | |
ThunderX CN8890 | |
General Info | |
Designer | Cavium |
Manufacturer | GlobalFoundries |
Model Number | CN8890 |
Part Number | CN8890-1900BG2601-AAP-Y-G |
Market | Server |
Introduction | June 3, 2014 (announced) March 31, 2016 (launched) |
Release Price | $785 |
General Specs | |
Family | ThunderX |
Frequency | 1,900 MHz |
Bus type | CCPI |
Microarchitecture | |
ISA | ARMv8.1 (ARM) |
Microarchitecture | ThunderX1 |
Process | 28 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 48 |
Threads | 48 |
Max Memory | 1 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Contents
Cache[edit]
- Main article: ThunderX1§ Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
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Supported ARM Extensions & Processor Features
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ThunderX_CP: public and private cloud servers.
Raw info[edit]
lscpu[edit]
# lscpu Architecture: aarch64 Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 1 Core(s) per socket: 48 Socket(s): 2 NUMA node(s): 2 L1d cache: 32K L1i cache: 78K L2 cache: 16384K NUMA node0 CPU(s): 0-47 NUMA node1 CPU(s): 48-95
lstopo[edit]
# lstopo-no-graphics Machine (252GB total) NUMANode L#0 (P#0 126GB) Package L#0 + L2 L#0 (16MB) L1d L#0 (32KB) + L1i L#0 (78KB) + Core L#0 + PU L#0 (P#0) L1d L#1 (32KB) + L1i L#1 (78KB) + Core L#1 + PU L#1 (P#1) L1d L#2 (32KB) + L1i L#2 (78KB) + Core L#2 + PU L#2 (P#2) L1d L#3 (32KB) + L1i L#3 (78KB) + Core L#3 + PU L#3 (P#3) L1d L#4 (32KB) + L1i L#4 (78KB) + Core L#4 + PU L#4 (P#4) L1d L#5 (32KB) + L1i L#5 (78KB) + Core L#5 + PU L#5 (P#5) L1d L#6 (32KB) + L1i L#6 (78KB) + Core L#6 + PU L#6 (P#6) L1d L#7 (32KB) + L1i L#7 (78KB) + Core L#7 + PU L#7 (P#7) L1d L#8 (32KB) + L1i L#8 (78KB) + Core L#8 + PU L#8 (P#8) L1d L#9 (32KB) + L1i L#9 (78KB) + Core L#9 + PU L#9 (P#9) L1d L#10 (32KB) + L1i L#10 (78KB) + Core L#10 + PU L#10 (P#10) L1d L#11 (32KB) + L1i L#11 (78KB) + Core L#11 + PU L#11 (P#11) L1d L#12 (32KB) + L1i L#12 (78KB) + Core L#12 + PU L#12 (P#12) L1d L#13 (32KB) + L1i L#13 (78KB) + Core L#13 + PU L#13 (P#13) L1d L#14 (32KB) + L1i L#14 (78KB) + Core L#14 + PU L#14 (P#14) L1d L#15 (32KB) + L1i L#15 (78KB) + Core L#15 + PU L#15 (P#15) L1d L#16 (32KB) + L1i L#16 (78KB) + Core L#16 + PU L#16 (P#16) L1d L#17 (32KB) + L1i L#17 (78KB) + Core L#17 + PU L#17 (P#17) L1d L#18 (32KB) + L1i L#18 (78KB) + Core L#18 + PU L#18 (P#18) L1d L#19 (32KB) + L1i L#19 (78KB) + Core L#19 + PU L#19 (P#19) L1d L#20 (32KB) + L1i L#20 (78KB) + Core L#20 + PU L#20 (P#20) L1d L#21 (32KB) + L1i L#21 (78KB) + Core L#21 + PU L#21 (P#21) L1d L#22 (32KB) + L1i L#22 (78KB) + Core L#22 + PU L#22 (P#22) L1d L#23 (32KB) + L1i L#23 (78KB) + Core L#23 + PU L#23 (P#23) L1d L#24 (32KB) + L1i L#24 (78KB) + Core L#24 + PU L#24 (P#24) L1d L#25 (32KB) + L1i L#25 (78KB) + Core L#25 + PU L#25 (P#25) L1d L#26 (32KB) + L1i L#26 (78KB) + Core L#26 + PU L#26 (P#26) L1d L#27 (32KB) + L1i L#27 (78KB) + Core L#27 + PU L#27 (P#27) L1d L#28 (32KB) + L1i L#28 (78KB) + Core L#28 + PU L#28 (P#28) L1d L#29 (32KB) + L1i L#29 (78KB) + Core L#29 + PU L#29 (P#29) L1d L#30 (32KB) + L1i L#30 (78KB) + Core L#30 + PU L#30 (P#30) L1d L#31 (32KB) + L1i L#31 (78KB) + Core L#31 + PU L#31 (P#31) L1d L#32 (32KB) + L1i L#32 (78KB) + Core L#32 + PU L#32 (P#32) L1d L#33 (32KB) + L1i L#33 (78KB) + Core L#33 + PU L#33 (P#33) L1d L#34 (32KB) + L1i L#34 (78KB) + Core L#34 + PU L#34 (P#34) L1d L#35 (32KB) + L1i L#35 (78KB) + Core L#35 + PU L#35 (P#35) L1d L#36 (32KB) + L1i L#36 (78KB) + Core L#36 + PU L#36 (P#36) L1d L#37 (32KB) + L1i L#37 (78KB) + Core L#37 + PU L#37 (P#37) L1d L#38 (32KB) + L1i L#38 (78KB) + Core L#38 + PU L#38 (P#38) L1d L#39 (32KB) + L1i L#39 (78KB) + Core L#39 + PU L#39 (P#39) L1d L#40 (32KB) + L1i L#40 (78KB) + Core L#40 + PU L#40 (P#40) L1d L#41 (32KB) + L1i L#41 (78KB) + Core L#41 + PU L#41 (P#41) L1d L#42 (32KB) + L1i L#42 (78KB) + Core L#42 + PU L#42 (P#42) L1d L#43 (32KB) + L1i L#43 (78KB) + Core L#43 + PU L#43 (P#43) L1d L#44 (32KB) + L1i L#44 (78KB) + Core L#44 + PU L#44 (P#44) L1d L#45 (32KB) + L1i L#45 (78KB) + Core L#45 + PU L#45 (P#45) L1d L#46 (32KB) + L1i L#46 (78KB) + Core L#46 + PU L#46 (P#46) L1d L#47 (32KB) + L1i L#47 (78KB) + Core L#47 + PU L#47 (P#47) HostBridge L#0 PCIBridge 2 x { PCI 177d:a026 } PCI 177d:a018 PCIBridge PCI 177d:a01d PCIBridge PCI 177d:a01a PCIBridge PCI 177d:a019 HostBridge L#5 PCI 177d:a01c Block(Disk) L#0 "sda" 2 x { PCI 177d:a01c } PCI 177d:a01c Block(Disk) L#1 "sdb" HostBridge L#6 PCIBridge PCI 177d:a01e PCI 177d:a034 Net L#2 "enP2p1s0f1" PCI 177d:a034 Net L#3 "enP2p1s0f2" PCI 177d:a034 Net L#4 "enP2p1s0f3" PCI 177d:a034 Net L#5 "enP2p1s0f4" PCI 177d:a034 Net L#6 "enP2p1s0f5" 55 x { PCI 177d:a034 } PCI 177d:a01f HostBridge L#8 8 x { PCI 177d:a01c } HostBridge L#9 PCIBridge PCIBridge PCI 1a03:2000 GPU L#7 "card0" GPU L#8 "controlD64" NUMANode L#1 (P#1 126GB) Package L#1 + L2 L#1 (16MB) L1d L#48 (32KB) + L1i L#48 (78KB) + Core L#48 + PU L#48 (P#48) L1d L#49 (32KB) + L1i L#49 (78KB) + Core L#49 + PU L#49 (P#49) L1d L#50 (32KB) + L1i L#50 (78KB) + Core L#50 + PU L#50 (P#50) L1d L#51 (32KB) + L1i L#51 (78KB) + Core L#51 + PU L#51 (P#51) L1d L#52 (32KB) + L1i L#52 (78KB) + Core L#52 + PU L#52 (P#52) L1d L#53 (32KB) + L1i L#53 (78KB) + Core L#53 + PU L#53 (P#53) L1d L#54 (32KB) + L1i L#54 (78KB) + Core L#54 + PU L#54 (P#54) L1d L#55 (32KB) + L1i L#55 (78KB) + Core L#55 + PU L#55 (P#55) L1d L#56 (32KB) + L1i L#56 (78KB) + Core L#56 + PU L#56 (P#56) L1d L#57 (32KB) + L1i L#57 (78KB) + Core L#57 + PU L#57 (P#57) L1d L#58 (32KB) + L1i L#58 (78KB) + Core L#58 + PU L#58 (P#58) L1d L#59 (32KB) + L1i L#59 (78KB) + Core L#59 + PU L#59 (P#59) L1d L#60 (32KB) + L1i L#60 (78KB) + Core L#60 + PU L#60 (P#60) L1d L#61 (32KB) + L1i L#61 (78KB) + Core L#61 + PU L#61 (P#61) L1d L#62 (32KB) + L1i L#62 (78KB) + Core L#62 + PU L#62 (P#62) L1d L#63 (32KB) + L1i L#63 (78KB) + Core L#63 + PU L#63 (P#63) L1d L#64 (32KB) + L1i L#64 (78KB) + Core L#64 + PU L#64 (P#64) L1d L#65 (32KB) + L1i L#65 (78KB) + Core L#65 + PU L#65 (P#65) L1d L#66 (32KB) + L1i L#66 (78KB) + Core L#66 + PU L#66 (P#66) L1d L#67 (32KB) + L1i L#67 (78KB) + Core L#67 + PU L#67 (P#67) L1d L#68 (32KB) + L1i L#68 (78KB) + Core L#68 + PU L#68 (P#68) L1d L#69 (32KB) + L1i L#69 (78KB) + Core L#69 + PU L#69 (P#69) L1d L#70 (32KB) + L1i L#70 (78KB) + Core L#70 + PU L#70 (P#70) L1d L#71 (32KB) + L1i L#71 (78KB) + Core L#71 + PU L#71 (P#71) L1d L#72 (32KB) + L1i L#72 (78KB) + Core L#72 + PU L#72 (P#72) L1d L#73 (32KB) + L1i L#73 (78KB) + Core L#73 + PU L#73 (P#73) L1d L#74 (32KB) + L1i L#74 (78KB) + Core L#74 + PU L#74 (P#74) L1d L#75 (32KB) + L1i L#75 (78KB) + Core L#75 + PU L#75 (P#75) L1d L#76 (32KB) + L1i L#76 (78KB) + Core L#76 + PU L#76 (P#76) L1d L#77 (32KB) + L1i L#77 (78KB) + Core L#77 + PU L#77 (P#77) L1d L#78 (32KB) + L1i L#78 (78KB) + Core L#78 + PU L#78 (P#78) L1d L#79 (32KB) + L1i L#79 (78KB) + Core L#79 + PU L#79 (P#79) L1d L#80 (32KB) + L1i L#80 (78KB) + Core L#80 + PU L#80 (P#80) L1d L#81 (32KB) + L1i L#81 (78KB) + Core L#81 + PU L#81 (P#81) L1d L#82 (32KB) + L1i L#82 (78KB) + Core L#82 + PU L#82 (P#82) L1d L#83 (32KB) + L1i L#83 (78KB) + Core L#83 + PU L#83 (P#83) L1d L#84 (32KB) + L1i L#84 (78KB) + Core L#84 + PU L#84 (P#84) L1d L#85 (32KB) + L1i L#85 (78KB) + Core L#85 + PU L#85 (P#85) L1d L#86 (32KB) + L1i L#86 (78KB) + Core L#86 + PU L#86 (P#86) L1d L#87 (32KB) + L1i L#87 (78KB) + Core L#87 + PU L#87 (P#87) L1d L#88 (32KB) + L1i L#88 (78KB) + Core L#88 + PU L#88 (P#88) L1d L#89 (32KB) + L1i L#89 (78KB) + Core L#89 + PU L#89 (P#89) L1d L#90 (32KB) + L1i L#90 (78KB) + Core L#90 + PU L#90 (P#90) L1d L#91 (32KB) + L1i L#91 (78KB) + Core L#91 + PU L#91 (P#91) L1d L#92 (32KB) + L1i L#92 (78KB) + Core L#92 + PU L#92 (P#92) L1d L#93 (32KB) + L1i L#93 (78KB) + Core L#93 + PU L#93 (P#93) L1d L#94 (32KB) + L1i L#94 (78KB) + Core L#94 + PU L#94 (P#94) L1d L#95 (32KB) + L1i L#95 (78KB) + Core L#95 + PU L#95 (P#95) HostBridge L#12 PCIBridge 2 x { PCI 177d:a026 } PCI 177d:a018 PCIBridge PCI 177d:a01d PCIBridge PCI 177d:a01a PCIBridge PCI 177d:a019 HostBridge L#17 4 x { PCI 177d:a01c } HostBridge L#18 PCIBridge PCI 177d:a01e PCI 177d:a034 Net L#9 "enP6p1s0f1" PCI 177d:a034 Net L#10 "enP6p1s0f2" 22 x { PCI 177d:a034 } PCI 177d:a01f HostBridge L#20 8 x { PCI 177d:a01c }
cpuinfo[edit]
# cat /proc/cpuinfo processor : 0 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 1 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 2 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 3 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 4 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 5 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 6 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 7 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 8 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 9 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 10 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 11 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 12 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 13 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 14 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 15 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 16 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 17 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 18 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 19 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 20 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 21 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 22 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 23 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 24 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 25 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 26 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 27 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 28 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 29 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 30 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 31 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 32 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 33 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 34 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 35 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 36 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 37 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 38 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 39 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 40 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 41 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 42 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 43 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 44 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 45 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 46 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 47 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 48 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 49 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 50 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 51 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 52 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 53 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 54 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 55 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 56 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 57 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 58 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 59 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 60 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 61 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 62 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 63 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 64 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 65 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 66 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 67 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 68 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 69 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 70 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 71 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 72 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 73 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 74 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 75 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 76 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 77 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 78 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 79 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 80 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 81 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 82 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 83 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 84 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 85 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 86 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 87 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 88 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 89 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 90 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 91 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 92 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 93 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 94 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1 processor : 95 BogoMIPS : 200.00 Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 CPU implementer : 0x43 CPU architecture: 8 CPU variant : 0x1 CPU part : 0x0a1 CPU revision : 1
See ARMv8 features for a description of flags.
Facts about "ThunderX CN8890 - Cavium"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | ThunderX CN8890 - Cavium#pcie + |
base frequency | 1,900 MHz (1.9 GHz, 1,900,000 kHz) + |
bus type | CCPI + |
core count | 48 + |
designer | Cavium + |
family | ThunderX + |
first announced | June 3, 2014 + |
first launched | March 31, 2016 + |
full page name | cavium/thunderx/cn8890 + |
has ecc memory support | true + |
instance of | microprocessor + |
isa | ARMv8.1 + |
isa family | ARM + |
l1$ size | 5,280 KiB (5,406,720 B, 5.156 MiB) + |
l1d$ description | 32-way set associative + |
l1d$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1i$ description | 39-way set associative + |
l1i$ size | 3,744 KiB (3,833,856 B, 3.656 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
ldate | March 31, 2016 + |
manufacturer | GlobalFoundries + |
market segment | Server + |
max cpu count | 2 + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory channels | 8 + |
max sata ports | 16 + |
max usb ports | 2 + |
microarchitecture | ThunderX1 + |
model number | CN8890 + |
name | ThunderX CN8890 + |
part number | CN8890-1900BG2601-AAP-Y-G + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
release price | $ 785.00 (€ 706.50, £ 635.85, ¥ 81,114.05) + |
smp max ways | 2 + |
supported memory type | DDR4-2400 + and DDR3-2133 + |
technology | CMOS + |
thread count | 48 + |
word size | 64 bit (8 octets, 16 nibbles) + |