From WikiChip
Difference between revisions of "nvidia/microarchitectures/nvdla"
(NVDLA) |
|||
| Line 1: | Line 1: | ||
{{nvidia title|NVDLA|arch}} | {{nvidia title|NVDLA|arch}} | ||
| − | {{microarchitecture}} | + | {{microarchitecture |
| + | |atype=NPU | ||
| + | |name=NVDLA | ||
| + | |designer=Nvidia | ||
| + | |manufacturer=TSMC | ||
| + | |introduction=2018 | ||
| + | }} | ||
'''NVDLA''' ('''NVIDIA Deep Learning Accelerator''') is a [[neural processor]] microarchitecture designed by [[Nvidia]]. Originally designed for their own {{nvidia|Xavier|Xavier SoC}}, the architecture has been made open source. | '''NVDLA''' ('''NVIDIA Deep Learning Accelerator''') is a [[neural processor]] microarchitecture designed by [[Nvidia]]. Originally designed for their own {{nvidia|Xavier|Xavier SoC}}, the architecture has been made open source. | ||
Revision as of 00:07, 3 September 2018
| Edit Values | |
| NVDLA µarch | |
| General Info | |
| Arch Type | NPU |
| Designer | Nvidia |
| Manufacturer | TSMC |
| Introduction | 2018 |
NVDLA (NVIDIA Deep Learning Accelerator) is a neural processor microarchitecture designed by Nvidia. Originally designed for their own Xavier SoC, the architecture has been made open source.
Bibliography
- IEEE Hot Chips 30 Symposium (HCS) 2018.
Facts about "NVDLA - Microarchitectures - Nvidia"
| codename | NVDLA + |
| designer | Nvidia + |
| first launched | 2018 + |
| full page name | nvidia/microarchitectures/nvdla + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| name | NVDLA + |