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== Collectability ==
 
== Collectability ==
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Due to its notability statues and historic value, the Intel 4004 is very collectible among collectors and non-collector alike. The ''C4004'', white ceramic package are the most sought-after version which sells for hundreds of dollars.  
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Due to its notability statues and historic value, the Intel 4004 is very collectible among collectors and non-collector alike. The ''C4004'', white ceramic package are the most sought-after version which sells for hundreds of dollars.
 +
 
 +
== Pinout ==
 +
[[File:4004 dil.svg|thumbnail|300px|right|Pinout diagram of the Intel 4004]]
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The 4004 has 16 pins that are used for i/o, memory controller, clock phases, power, and reset.
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{| class="wikitable"
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|-
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|+  Pinout & Description
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|-
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! style="width: 25px;" | Pin # !! style="width:50px;" | Pin Name !! style="width:30px;" | Purpose !! style="width:40px;" | Explanation
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|-
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| 1 || D0 || rowspan="4" | Bidirectional data bus pins ||  rowspan="4" | Address and data communication to the ROM and RAM occurs on D0-D3.
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|-
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| 2 || D1
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|-
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| 3 || D2
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|-
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| 4 || D3
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|-
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| 5 || V<sub>ss</sub> || Main Supply ||
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|-
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| 6 || Clock Phase 1 || rowspan="2" | Clock inputs || rowspan="2" |
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|-
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| 7 || Clock Phase 2
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|-
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| 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the raising edge.
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|-
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| 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles to take effect.
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|-
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| 10 || Test || Test logic state || Signal can be tested via the <code>JCN</code> instruction.
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|-
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| 11 || CM-ROM || CM-ROM output || ROM selection signal used to retrieve data from memory.
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|-
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| 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% ||
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|-
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| 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM-ROM outputs || rowspan="4" | Bank selection signal for the [[Intel 4002|4002 RAM]] chips in the system.
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|-
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| 14 || CM-RAM<sub>2</sub>
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|-
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| 15 || CM-RAM<sub>1</sub>
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|-
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| 16 || CM-RAM<sub>0</sub>
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|}
  
 
== References ==
 
== References ==

Revision as of 01:46, 19 December 2013

Intel 4004
C4004 (Intel).jpg

Developer Intel

Introduction date March 1971

Model 4004

Transistors 2,300

Cores 1

Clock 740 KHz

Bus Width 4-bit

Lithography 10μm

Max TDP 0.63 W

Memory Specs
Max Memory 4KB (program)
640B (RAM)

Packaging
Package 16-pin DIP

The Intel 4004 was the first commercially available microprocessor in history released by Intel Corporation in 1971. The 4004 was a 4-bit CPU designed for use in the Busicom 141-PF printing calculator[1]. The chip, which clocked at 740 KHz, employed a 10µm[2] process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of program memory and 640 bytes of RAM. The 4004 was part of the Intel MCS4 system.

The microprocessor had a limited architecture such as only 3-levels deep stack, a complex memory access scheme, and no interrupt support.

History

An ad for the 4004 in the Nov. 15, 1971 issue of Electronic News

Before Federico Faggin joined Intel in 1970, the development of the 4004 was stall was dreadful. At Intel, Federico developed several design innovations that made it possible to fit the microprocessor in one chip, including new methodology for random logic chip design using silicon gate technology.[3]. He developed the 4004 testing tool, the chip and logic design together with the layout of all the chips of the entire MCS-4 system.

In November of 1971, a memory chip manufacturer by the name Intel publicly announcement the world's first single chip microprocessor, in the Nov. 15, issue of Electronic News. The prophetic ad read: "Announcing a new era in integrated electronics". The chip was designed by Federico Faggin, Ted Hoff, and Masatoshi Shima and received U.S. Patent #3,821,715. The original 4004 chips were shipped in a 16-pin ceramic DIP.

Variations

A National Semiconductor version of the 4004, INS4004J

Three primary source variations were produced by Intel: C4004, D4004, and the P4004. The Intel C4004 is the first chip to be manufactured. It had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976. The Intel D4004 was first produced around mid 1976, had a plastic and black ceramic package. The Intel P4004 is the plastic packaging version.

Only one known secondary source exists, made by National Semiconductor since mid-1975. The National Semiconductor produced two versions: INS4004J and INS4004D. The INS4004J is a 16-pin black ceramic DIP. The INS4004D version is a 16-pin side-brazed ceramic DIP.

Manufacturer Model Package
Intel C4004 16-pin Ceramic DIP
Intel D4004 16-pin Ceramic DIP
Intel P4004 16-pin Plastic DIP
National Semiconductor INS4004D 16-pin Ceramic DIP
National Semiconductor INS4004J 16-pin side-brazed Ceramic DIP

Collectability

Due to its notability statues and historic value, the Intel 4004 is very collectible among collectors and non-collector alike. The C4004, white ceramic package are the most sought-after version which sells for hundreds of dollars.

Pinout

Pinout diagram of the Intel 4004

The 4004 has 16 pins that are used for i/o, memory controller, clock phases, power, and reset.

Pinout & Description
Pin # Pin Name Purpose Explanation
1 D0 Bidirectional data bus pins Address and data communication to the ROM and RAM occurs on D0-D3.
2 D1
3 D2
4 D3
5 Vss Main Supply
6 Clock Phase 1 Clock inputs
7 Clock Phase 2
8 Sync ROM & RAM Sync Synchronizes the ROM and RAM by signaling the clock is on the raising edge.
9 Reset Reset flag A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles to take effect.
10 Test Test logic state Signal can be tested via the JCN instruction.
11 CM-ROM CM-ROM output ROM selection signal used to retrieve data from memory.
12 VDD VSS -15±5%
13 CM-RAM3 CM-ROM outputs Bank selection signal for the 4002 RAM chips in the system.
14 CM-RAM2
15 CM-RAM1
16 CM-RAM0

References

  1. ↑ The Story of the Intel® 4004
  2. ↑ 4004 Datasheet
  3. ↑ Faggin. Il padre del chip intelligente, Angelo Gallippi, 2002, 88-7118-149-2
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