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Difference between revisions of "loongson/godson 2/2d1"
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− | '''Godson-2D1''' ('''龙芯2D1''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers.The Godson-2D1 operates at up to 800 MHz consuming | + | '''Godson-2D1''' ('''龙芯2D1''') is a {{arch|64}} [[MIPS]] performance processor developed by [[Institute of Computing Technology of the Chinese Academy of Sciences|ICT]] and later [[Loongson]] for desktop computers.The Godson-2D1 operates at up to 800 MHz consuming up to 6 W. This chip was manufactured on [[STMicroelectronics]]' [[0.13 µm process]]. This chip reached tapeout on January 6, 2005. |
Loongson has claimed the Godson-2D has reached the performance level of 1.5 GHz {{intel|PIV}} based on their SPECint2000 scores. | Loongson has claimed the Godson-2D has reached the performance level of 1.5 GHz {{intel|PIV}} based on their SPECint2000 scores. |
Latest revision as of 15:31, 13 December 2017
Edit Values | |
Godson-2D1 | |
General Info | |
Designer | Loongson |
Manufacturer | STMicroelectronics |
Model Number | 2D1 |
Market | Desktop |
Introduction | January 2006 (announced) 2006 (launched) |
General Specs | |
Family | Godson 2 |
Series | Godson 2 |
Frequency | 800 MHz |
Microarchitecture | |
ISA | MIPS64 (MIPS) |
Microarchitecture | GS464 |
Core Name | GS464 |
Process | 130 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 1 |
Threads | 1 |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 6 W |
Godson-2D1 (龙芯2D1) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers.The Godson-2D1 operates at up to 800 MHz consuming up to 6 W. This chip was manufactured on STMicroelectronics' 0.13 µm process. This chip reached tapeout on January 6, 2005.
Loongson has claimed the Godson-2D has reached the performance level of 1.5 GHz PIV based on their SPECint2000 scores.
Cache[edit]
- Main article: GS464 § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Godson-2D1 - Loongson"
base frequency | 800 MHz (0.8 GHz, 800,000 kHz) + |
core count | 1 + |
core name | GS464 + |
designer | Loongson + |
family | Godson 2 + |
first announced | January 2006 + |
first launched | 2006 + |
full page name | loongson/godson 2/2d1 + |
instance of | microprocessor + |
isa | MIPS64 + |
isa family | MIPS + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
ldate | 2006 + |
manufacturer | STMicroelectronics + |
market segment | Desktop + |
max cpu count | 1 + |
microarchitecture | GS464 + |
model number | 2D1 + |
name | Godson-2D1 + |
power dissipation | 6 W (6,000 mW, 0.00805 hp, 0.006 kW) + |
process | 130 nm (0.13 μm, 1.3e-4 mm) + |
series | Godson 2 + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |
word size | 64 bit (8 octets, 16 nibbles) + |