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Difference between revisions of "loongson/godson 2/2b"
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{{loongson title|Godson-2B}}
 
{{loongson title|Godson-2B}}
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| name                = Godson-2B
 
| name                = Godson-2B
 
| image              = godson-2b.png
 
| image              = godson-2b.png
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| model number        = 2B
 
| model number        = 2B
 
| part number        = MZD110
 
| part number        = MZD110
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| part number 1       =  
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| part number 2       =  
 
| market              = Desktop
 
| market              = Desktop
 
| first announced    = 2003
 
| first announced    = 2003

Latest revision as of 15:31, 13 December 2017

Edit Values
Godson-2B
godson-2b.png
Godson-2B chip
General Info
DesignerLoongson
ManufacturerSMICS
Model Number2B
Part NumberMZD110
MarketDesktop
Introduction2003 (announced)
October 17, 2003 (launched)
General Specs
FamilyGodson 2
SeriesGodson 2
Frequency300 MHz
Microarchitecture
ISAMIPS64 (MIPS)
MicroarchitectureGS464
Core NameGS464
Process180 nm
TechnologyCMOS
Word Size64 bit
Cores1
Threads1
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation3 W

Godson-2B (龙芯2B) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late 2003, the Godson-2B operates at up to 300 MHz consuming up to 3 W. This chip was manufactured on SMICS' 0.18 µm process and is known as China's first 64-bit microprocessor. This chip reached tapeout on August 13, 2003.

The Godson-2B is roughly three to five times the performance of the Godson 1.

Cache[edit]

Main article: GS464 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
Retrieved from "https://en.wikichip.org/w/index.php?title=loongson/godson_2/2b&oldid=71123"
Facts about "Godson-2B - Loongson"
RDF feed
base frequency300 MHz (0.3 GHz, 300,000 kHz) +
core count1 +
core nameGS464 +
designerLoongson +
familyGodson 2 +
first announced2003 +
first launchedOctober 17, 2003 +
full page nameloongson/godson 2/2b +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +
ldateOctober 17, 2003 +
main imageFile:godson-2b.png +
main image captionGodson-2B chip +
manufacturerSMICS +
market segmentDesktop +
max cpu count1 +
microarchitectureGS464 +
model number2B +
nameGodson-2B +
part numberMZD110 +
power dissipation3 W (3,000 mW, 0.00402 hp, 0.003 kW) +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesGodson 2 +
smp max ways1 +
technologyCMOS +
thread count1 +
word size64 bit (8 octets, 16 nibbles) +