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Difference between revisions of "intel/xeon e3/e3-1260l v5"
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{{intel title|Xeon E3-1260L V5}}
+
{{intel title|Xeon E3-1260L v5}}
−
{{mpu
+
{{chip
−
| name               = Xeon E3-1260L V5
+
|name=Xeon E3-1260L v5
−
| no image           = Yes
+
|image=skylake dt (front).png
−
| image              =
+
|designer=Intel
−
| image size          =
+
|manufacturer=Intel
−
| caption            =  
+
|model number=E3-1260L v5
−
| designer           = Intel
+
|part number=CM8066201921903
−
| manufacturer       = Intel
+
|s-spec=SR2CR
−
| model number       = E3-1260L V5
+
|s-spec 2=SR2LH
−
| part number         = CM8066201921903
+
|market=Server
−
| market             = Server
+
|first announced=October 19, 2015
−
| first announced     = October 19, 2015
+
|first launched=October 19, 2015
−
| first launched     = October 19, 2015
+
|release price=$294
−
| last order          =  
+
|family=Xeon E3
−
| last shipment      =
+
|series=E3-1200 v5
−
 
+
|locked=Yes
−
| family             = Xeon E3
+
|frequency=2,900 MHz
−
| series             = E3-1200 V5
+
|turbo frequency1=3,900 MHz
−
| locked             = Yes
+
|bus type=DMI 3.0
−
| frequency           = 2900 MHz
+
|bus links=4
−
| turbo frequency    = Yes
+
|bus rate=8 GT/s
−
| turbo frequency1   = 3900 MHz
+
|clock multiplier=29
−
| turbo frequency2    =
+
|cpuid=506E3
−
| turbo frequency3    =
+
|isa=x86-64
−
| turbo frequency4    =
+
|isa family=x86
−
| bus type           = DMI 3.0
+
|microarch=Skylake
−
| bus speed          =  
+
|platform=Greenlow
−
| bus rate           = 8 GT/s
+
|chipset=Sunrise Point
−
| clock multiplier   =  
+
|core name=Skylake DT
−
| s-spec              = SR2CR
+
|core family=6
−
| s-spec 2            = SR2LH
+
|core model=94
−
| s-spec es          =
+
|core stepping=R0
−
| s-spec qs          =
+
|process=14 nm
−
| cpuid              = 506E3
+
|technology=CMOS
−
 
+
|die area=122 mm²
−
| microarch           = Skylake
+
|word size=64 bit
−
| platform           = Greenlow
+
|core count=4
−
| chipset             = Silver Pass
+
|thread count=8
−
| core name           = Skylake DT
+
|max cpus=1
−
| core family         = 6
+
|max memory=64 GiB
−
| core model         = 14
+
|v core min=0.55 V
−
| core stepping       = R0
+
|v core max=1.52 V
−
| process             = 14 nm
+
|tdp=45 W
−
| transistors        =
+
|tjunc min=0 °C
−
| technology         = CMOS
+
|tjunc max=100 °C
−
| die size            =  
+
|tstorage min=-25 °C
−
| word size           = 64 bit
+
|tstorage max=125 °C
−
| core count         = 4
+
|package module 1={{packages/intel/lga-1151}}
−
| thread count       = 8
+
|turbo frequency=Yes
−
| max cpus           = 1
 
−
| max memory         = 64 GB
 
−
 
 
−
| electrical          = Yes
 
−
| v core             =  
 
−
| v core tolerance    =
 
−
| sdp                =  
 
−
| tdp                 = 45 W
 
−
| ctdp down          =
 
−
| ctdp down frequency =
 
−
| ctdp up            =
 
−
| ctdp up frequency  =
 
−
| temp max           = 100 °C
 
−
| temp min           = 0 °C
 
−
 
 
−
| packaging          = Yes
 
−
| package             = FCLGA1151
 
−
| package type        = FCLGA
 
−
| package size        = 37.5mm x 37.5mm
 
−
| socket              = LGA1151
 
−
| socket type        = LGA
 
 
}}
 
}}
−
The '''Xeon E3-1260L V5''' is an entry-level workstations and servers {{arch|64}} [[x86]] quad-core microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L V5 has a TDP of 45 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has no [[integrated graphics processor]].
+
'''Xeon E3-1260L v5''' is an entry-level server and workstation {{arch|64}} [[quad-core]] [[x86]] microprocessor introduced by [[Intel]] in October 2015. This {{intel|Skylake}}-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L v5 is a special low-power chip with a TDP of 45 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  
 
== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
 
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
−
{{cache info
+
{{cache size
−
|l1i cache=128 KB
+
|l1 cache=256 KiB
−
|l1i break=4x32 KB
+
|l1i cache=128 KiB
 +
|l1i break=4x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1i extra=(per core, write-back)
+
|l1d cache=128 KiB
−
|l1d cache=128 KB
+
|l1d break=4x32 KiB
−
|l1d break=4x32 KB
 
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
−
|l1d extra=(per core, write-back)
+
|l1d policy=write-back
−
|l2 cache=1 MB
+
|l2 cache=1 MiB
−
|l2 break=4x256 KB
+
|l2 break=4x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
−
|l2 extra=(per core)
+
|l2 policy=write-back
−
|l3 cache=8 MB
+
|l3 cache=8 MiB
−
|l3 break=4x2 MB
+
|l3 break=4x2 MiB
−
|l3 desc=
+
|l3 policy=write-back
−
|l3 extra=
+
}}
 +
 
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR3L-1600
 +
|type 2=DDR4-2133
 +
|ecc=Yes
 +
|max mem=64 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=31.79 GiB/s
 +
|bandwidth schan=15.89 GiB/s
 +
|bandwidth dchan=31.79 GiB/s
 +
}}
 +
 
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 +
| pcie config 3      = 1x8+2x4
 
}}
 
}}
 +
 
== Graphics ==
 
== Graphics ==
−
This SoC has no integrated graphics processing unit.
+
This chip has no integrated graphics processing unit.
 +
 
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
 +
 
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=No
 +
|att=No
 +
|ipt=No
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=Yes
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
}}

Latest revision as of 15:26, 13 December 2017

Edit Values
Xeon E3-1260L v5
skylake dt (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberE3-1260L v5
Part NumberCM8066201921903
S-SpecSR2CR, SR2LH
MarketServer
IntroductionOctober 19, 2015 (announced)
October 19, 2015 (launched)
Release Price$294
ShopAmazon
General Specs
FamilyXeon E3
SeriesE3-1200 v5
LockedYes
Frequency2,900 MHz
Turbo FrequencyYes
Turbo Frequency3,900 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier29
CPUID506E3
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake
PlatformGreenlow
ChipsetSunrise Point
Core NameSkylake DT
Core Family6
Core Model94
Core SteppingR0
Process14 nm
TechnologyCMOS
Die122 mm²
Word Size64 bit
Cores4
Threads8
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore0.55 V-1.52 V
TDP45 W
Tjunction0 °C – 100 °C
Tstorage-25 °C – 125 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Xeon E3-1260L v5 is an entry-level server and workstation 64-bit quad-core x86 microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 2.9 GHz with turbo boost of 3.9 GHz. The E3-1260L v5 is a special low-power chip with a TDP of 45 Watts and supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no integrated graphics processor.

Cache[edit]

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2133
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics[edit]

This chip has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e3/e3-1260l_v5&oldid=70945"
Facts about "Xeon E3-1260L v5 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1260L v5 - Intel#package + and Xeon E3-1260L v5 - Intel#io +
base frequency2,900 MHz (2.9 GHz, 2,900,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetSunrise Point +
clock multiplier29 +
core count4 +
core family6 +
core model94 +
core nameSkylake DT +
core steppingR0 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.55 V (5.5 dV, 55 cV, 550 mV) +
cpuid506E3 +
designerIntel +
die area122 mm² (0.189 in², 1.22 cm², 122,000,000 µm²) +
familyXeon E3 +
first announcedOctober 19, 2015 +
first launchedOctober 19, 2015 +
full page nameintel/xeon e3/e3-1260l v5 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateOctober 19, 2015 +
main imageFile:skylake dt (front).png +
manufacturerIntel +
market segmentServer +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSkylake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE3-1260L v5 +
nameXeon E3-1260L v5 +
packageFCLGA-1151 +
part numberCM8066201921903 +
platformGreenlow +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 294.00 (€ 264.60, £ 238.14, ¥ 30,379.02) +
s-specSR2CR + and SR2LH +
seriesE3-1200 v5 +
smp max ways1 +
socketLGA-1151 +
supported memory typeDDR3L-1600 + and DDR4-2133 +
tdp45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technologyCMOS +
thread count8 +
turbo frequency (1 core)3,900 MHz (3.9 GHz, 3,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +