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Difference between revisions of "intel/core i5/i5-7400"
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{{intel title|Core i5-7400}} | {{intel title|Core i5-7400}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=Core i5-7400 |
− | | no image | + | |no image=Yes |
− | + | |designer=Intel | |
− | + | |manufacturer=Intel | |
− | + | |model number=i5-7400 | |
− | | designer | + | |part number=CM8067702867050 |
− | | manufacturer | + | |part number 2=BXC80677I57400 |
− | | model number | + | |part number 3=BX80677I57400 |
− | | part number | + | |s-spec=SR32W |
− | | part number | + | |market=Desktop |
− | | part number | + | |first announced=January 3, 2017 |
− | | s-spec | + | |first launched=January 3, 2017 |
− | | market | + | |release price=$182.00 |
− | | first announced | + | |family=Core i5 |
− | | first launched | + | |series=i5-7400 |
− | + | |locked=Yes | |
− | + | |frequency=3,000 MHz | |
− | | release price | + | |turbo frequency1=3,500 MHz |
− | + | |turbo frequency2=3,400 MHz | |
− | | family | + | |turbo frequency3=3,400 MHz |
− | | series | + | |turbo frequency4=3,300 MHz |
− | | locked | + | |bus type=DMI 3.0 |
− | | frequency | + | |bus rate=8 GT/s |
− | + | |clock multiplier=30 | |
− | | turbo frequency1 | + | |isa=x86-64 |
− | | turbo frequency2 | + | |isa family=x86 |
− | | turbo frequency3 | + | |microarch=Kaby Lake |
− | | turbo frequency4 | + | |platform=Kaby Lake |
− | | bus type | + | |chipset=Sunrise Point |
− | + | |chipset 2=Union Point | |
− | | bus rate | + | |core name=Kaby Lake S |
− | + | |core family=6 | |
− | | clock multiplier | + | |core model=158 |
− | + | |core stepping=B0 | |
− | + | |process=14 nm | |
− | | isa | + | |technology=CMOS |
− | | isa | + | |word size=64 bit |
− | | microarch | + | |core count=4 |
− | | platform | + | |thread count=4 |
− | | chipset | + | |max cpus=1 |
− | | chipset 2 | + | |max memory=64 GiB |
− | | core name | + | |v core min=0.55 V |
− | | core family | + | |v core max=1.52 V |
− | | core model | + | |tdp=65 W |
− | | core stepping | + | |tjunc min=0 °C |
− | + | |tjunc max=100 °C | |
− | | process | + | |tstorage min=-25 °C |
− | + | |tstorage max=125 °C | |
− | | technology | + | |package module 1={{packages/intel/lga-1151}} |
− | + | |turbo frequency=Yes | |
− | |||
− | |||
− | | word size | ||
− | | core count | ||
− | | thread count | ||
− | | max cpus | ||
− | | max memory | ||
− | |||
− | |||
− | | v core min | ||
− | | v core max | ||
− | |||
− | | tdp | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | | tjunc min | ||
− | | tjunc max | ||
− | |||
− | |||
− | | tstorage min | ||
− | | tstorage max | ||
− | |||
− | |||
− | |||
− | | package module 1 | ||
}} | }} | ||
− | + | '''Core i5-7400''' is a {{arch|64}} [[quad-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The i5-7400 operates at 3 GHz with a TDP of 65 W supporting a {{intel|Turbo Boost}} frequency of 3.5 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's {{intel|HD Graphics 630}} [[IGP]] operating at 350 MHz with a burst frequency of 1 GHz. | |
− | |||
− | |||
− | {{ | ||
== Cache == | == Cache == | ||
− | {{main|intel/microarchitectures/ | + | {{main|intel/microarchitectures/kaby_lake#Memory_Hierarchy|l1=Kaby Lake § Cache}} |
− | {{cache | + | {{cache size |
+ | |l1 cache=256 KiB | ||
|l1i cache=128 KiB | |l1i cache=128 KiB | ||
|l1i break=4x32 KiB | |l1i break=4x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
− | |||
|l1d cache=128 KiB | |l1d cache=128 KiB | ||
|l1d break=4x32 KiB | |l1d break=4x32 KiB | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
− | |l1d | + | |l1d policy=write-back |
|l2 cache=1 MiB | |l2 cache=1 MiB | ||
|l2 break=4x256 KiB | |l2 break=4x256 KiB | ||
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
− | |l2 | + | |l2 policy=write-back |
|l3 cache=6 MiB | |l3 cache=6 MiB | ||
− | |l3 desc= | + | |l3 break=4x1.5 MiB |
+ | |l3 desc=12-way set associative | ||
+ | |l3 policy=write-back | ||
+ | }} | ||
+ | |||
+ | == Memory controller == | ||
+ | {{memory controller | ||
+ | |type=DDR3L-1600 | ||
+ | |type 2=DDR4-2400 | ||
+ | |ecc=No | ||
+ | |max mem=64 GiB | ||
+ | |controllers=1 | ||
+ | |channels=2 | ||
+ | |max bandwidth=35.76 GiB/s | ||
+ | |bandwidth schan=17.88 GiB/s | ||
+ | |bandwidth dchan=35.76 GiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 16 | ||
+ | | pcie config = 1x16 | ||
+ | | pcie config 2 = 2x8 | ||
+ | | pcie config 3 = 1x8+2x4 | ||
}} | }} | ||
== Graphics == | == Graphics == | ||
− | {{integrated | + | {{integrated graphics |
− | | gpu = | + | | gpu = HD Graphics 630 |
− | | device id = | + | | device id = 0x5912 |
+ | | designer = Intel | ||
| execution units = 24 | | execution units = 24 | ||
− | | displays | + | | max displays = 3 |
− | | frequency = | + | | max memory = 64 GiB |
− | | max frequency = | + | | frequency = 350 MHz |
− | + | | max frequency = 1,000 MHz | |
| output crt = | | output crt = | ||
Line 123: | Line 117: | ||
| output dvi = Yes | | output dvi = Yes | ||
− | | directx ver | + | | directx ver = 12 |
− | | opengl ver | + | | opengl ver = 4.4 |
− | | opencl ver | + | | opencl ver = 2.0 |
− | | | + | | hdmi ver = 1.4a |
− | | | + | | dp ver = 1.2 |
− | | | + | | edp ver = 1.4 |
− | | | + | | max res hdmi = 4096x2304 |
− | | | + | | max res hdmi freq = 24 Hz |
− | | dp | + | | max res dp = 4096x2304 |
− | | edp | + | | max res dp freq = 60 Hz |
+ | | max res edp = 4096x2304 | ||
+ | | max res edp freq = 60 Hz | ||
+ | | max res vga = | ||
+ | | max res vga freq = | ||
+ | |||
+ | | features = Yes | ||
+ | | intel quick sync = Yes | ||
+ | | intel intru 3d = Yes | ||
+ | | intel insider = | ||
+ | | intel widi = | ||
+ | | intel fdi = | ||
+ | | intel clear video = Yes | ||
+ | | intel clear video hd = Yes | ||
+ | }} | ||
+ | {{kaby lake hardware accelerated video table|col=1}} | ||
− | | | + | == Features == |
− | | | + | {{x86 features |
− | | | + | |real=Yes |
− | | | + | |protected=Yes |
− | | | + | |smm=Yes |
− | | | + | |fpu=Yes |
− | | | + | |x8616=Yes |
− | | | + | |x8632=Yes |
− | | | + | |x8664=Yes |
− | | | + | |nx=Yes |
− | | | + | |3dnow=No |
− | | | + | |e3dnow=No |
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
− | | | + | |abm=Yes |
− | | | + | |tbm=No |
− | | | + | |bmi1=Yes |
− | | | + | |bmi2=Yes |
− | | | + | |fma3=Yes |
− | | | + | |fma4=No |
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=Yes | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=No | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=Yes | ||
+ | |tsx=Yes | ||
+ | |txt=No | ||
+ | |ht=No | ||
+ | |vpro=No | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=No | ||
+ | |mpx=Yes | ||
+ | |sgx=Yes | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdv=No | ||
+ | |rvi=No | ||
}} | }} | ||
− | == | + | == Die Shot == |
− | {{ | + | {{see also|intel/microarchitectures/kaby_lake#Die|l1=Kaby Lake § Die Shot}} |
− | | | + | A die shot of Intel's Kaby Lake [[Quad Core]] desktop processors: |
− | | | + | |
− | + | : [[File:kaby lake (quad core).png|650px]] | |
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− | + | : [[File:kaby lake (quad core) (annotated).png|650px]] | |
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Latest revision as of 15:20, 13 December 2017
Edit Values | ||||||||||||
Core i5-7400 | ||||||||||||
General Info | ||||||||||||
Designer | Intel | |||||||||||
Manufacturer | Intel | |||||||||||
Model Number | i5-7400 | |||||||||||
Part Number | CM8067702867050, BXC80677I57400, BX80677I57400 | |||||||||||
S-Spec | SR32W | |||||||||||
Market | Desktop | |||||||||||
Introduction | January 3, 2017 (announced) January 3, 2017 (launched) | |||||||||||
Release Price | $182.00 | |||||||||||
Shop | Amazon | |||||||||||
General Specs | ||||||||||||
Family | Core i5 | |||||||||||
Series | i5-7400 | |||||||||||
Locked | Yes | |||||||||||
Frequency | 3,000 MHz | |||||||||||
Turbo Frequency | Yes | |||||||||||
Turbo Frequency | 3,500 MHz (1 core), 3,400 MHz (2 cores), 3,400 MHz (3 cores), 3,300 MHz (4 cores) | |||||||||||
Bus type | DMI 3.0 | |||||||||||
Bus rate | 8 GT/s | |||||||||||
Clock multiplier | 30 | |||||||||||
Microarchitecture | ||||||||||||
ISA | x86-64 (x86) | |||||||||||
Microarchitecture | Kaby Lake | |||||||||||
Platform | Kaby Lake | |||||||||||
Chipset | Sunrise Point, Union Point | |||||||||||
Core Name | Kaby Lake S | |||||||||||
Core Family | 6 | |||||||||||
Core Model | 158 | |||||||||||
Core Stepping | B0 | |||||||||||
Process | 14 nm | |||||||||||
Technology | CMOS | |||||||||||
Word Size | 64 bit | |||||||||||
Cores | 4 | |||||||||||
Threads | 4 | |||||||||||
Max Memory | 64 GiB | |||||||||||
Multiprocessing | ||||||||||||
Max SMP | 1-Way (Uniprocessor) | |||||||||||
Electrical | ||||||||||||
Vcore | 0.55 V-1.52 V | |||||||||||
TDP | 65 W | |||||||||||
Tjunction | 0 °C – 100 °C | |||||||||||
Tstorage | -25 °C – 125 °C | |||||||||||
Packaging | ||||||||||||
|
Core i5-7400 is a 64-bit quad-core mid-range performance x86 desktop microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7400 operates at 3 GHz with a TDP of 65 W supporting a Turbo Boost frequency of 3.5 GHz. The processor supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory and incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1 GHz.
Cache[edit]
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options
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Graphics[edit]
Integrated Graphics Information
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[Edit] Kaby Lake (Gen9.5) Hardware Accelerated Video Capabilities | |||||||
---|---|---|---|---|---|---|---|
Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | Main | High | 1080p (FHD) | Main | Main, High | 1080p (FHD) | |
MPEG-4 AVC (H.264) | High, Main | 5.1 | 2160p (4K) | Main, High, MVC, Stereo | 5.1 | 2160p (4K) | |
JPEG/MJPEG | Baseline | - | 16k x 16k | Baseline | Unified | 16k x 16k | |
HEVC (H.265) | Main, Main 10 | 5.1 | 2160p (4K) | Main, Main 10 | 5.1 | 2160p (4K) | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | 3840x3840 | |||
VP8 | Unified | Unified | N/A | 0 | Unified | 1080p | |
VP9 | 0 | 2160p (4K) | 0, 2 | Unified | 2160p (4K) |
Features[edit]
[Edit/Modify Supported Features]
Die Shot[edit]
- See also: Kaby Lake § Die Shot
A die shot of Intel's Kaby Lake Quad Core desktop processors:
Facts about "Core i5-7400 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i5-7400 - Intel#package + and Core i5-7400 - Intel#io + |
base frequency | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Sunrise Point + and Union Point + |
clock multiplier | 30 + |
core count | 4 + |
core family | 6 + |
core model | 158 + |
core name | Kaby Lake S + |
core stepping | B0 + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x5912 + |
family | Core i5 + |
first announced | January 3, 2017 + |
first launched | January 3, 2017 + |
full page name | intel/core i5/i5-7400 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 630 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 24 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 12-way set associative + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
ldate | January 3, 2017 + |
manufacturer | Intel + |
market segment | Desktop + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Kaby Lake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | i5-7400 + |
name | Core i5-7400 + |
package | FCLGA-1151 + |
part number | CM8067702867050 +, BXC80677I57400 + and BX80677I57400 + |
platform | Kaby Lake + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 182.00 (€ 163.80, £ 147.42, ¥ 18,806.06) + |
s-spec | SR32W + |
series | i5-7400 + |
smp max ways | 1 + |
socket | LGA-1151 + |
supported memory type | DDR3L-1600 + and DDR4-2400 + |
tdp | 65 W (65,000 mW, 0.0872 hp, 0.065 kW) + |
technology | CMOS + |
thread count | 4 + |
turbo frequency (1 core) | 3,500 MHz (3.5 GHz, 3,500,000 kHz) + |
turbo frequency (2 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
turbo frequency (3 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
turbo frequency (4 cores) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |