Difference between revisions of "intel/core i5/i5-2540m"

	Edit Values
	Core i5-2540M
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i5-2540M
Part Number	FF8062700839209,; AV8062700839411
S-Spec	SR044, SR046
Market	Mobile
Introduction	February, 2011 (announced); February, 2011 (launched)
Release Price	$266.00
Shop	Amazon
	General Specs
Family	Core i5
Series	i5-2000
Locked	Yes
Frequency	2,600 MHz
Turbo Frequency	3,300 MHz (1 core),; 3,100 MHz (2 cores)
Bus type	DMI 2.0
Bus rate	4 × 5 GT/s
Clock multiplier	26
CPUID	0x206A7
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Sandy Bridge
Platform	Sandy Bridge M
Chipset	Cougar Point
Core Name	Sandy Bridge M
Core Family	6
Core Model	42
Core Stepping	J1
Process	32 nm
Transistors	624,000,000
Technology	CMOS
Die	149 mm²
Word Size	64 bit
Cores	2
Threads	4
Max Memory	16 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
Power (idle)	3.1 W
Vcore	0.3 V-1.52 V
TDP	35 W
Tjunction	0 °C – 100 °C
Tstorage	-25 °C – 125 °C
	Packaging
Package	FCBGA-1023 (BGA)
Dimension	31 mm x 24 mm
Pitch	0.65 mm
Contacts	1023
Package	rPGA988B (PGA)
Dimension	37.5 mm x 37.5 mm
Pitch	1 mm
Contacts	988
Socket	Socket G2

Latest revision as of 15:19, 13 December 2017

Core i5-2540M is a dual-core mid-range performance mobile x86 microprocessor introduced by Intel in early 2011. This chip, which is fabricated on a 32 nm process based on the Sandy Bridge microarchitecture, operates at 2.6 GHz with a TDP of 35 Watts and a Turbo Boost frequency of up to 3.3 GHz. The i5-2540M incorporates HD Graphics 3000 integrated graphics operating at 650 MHz with a burst frequency of 1.3 GHz and supports up to 16 GiB of dual-channel DDR3-1333 memory.

Cache[edit]

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

128 KiB

131,072 B
0.125 MiB

L1I$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	2x32 KiB	8-way set associative	write-back

L2$

512 KiB

0.5 MiB
524,288 B
4.882812e-4 GiB

		2x256 KiB	8-way set associative	write-back

L3$

3 MiB

3,072 KiB
3,145,728 B
0.00293 GiB

		2x1.5 MiB	12-way set associative	write-back

Memory controller[edit]

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR3-1333, DDR3-1066
Supports ECC	No
Max Mem	16 GiB
Controllers	1
Channels	2
Max Bandwidth	19.87 GiB/s 20,346.88 MiB/s 21.335 GB/s 21,335.25 MB/s 0.0194 TiB/s 0.0213 TB/s
Bandwidth	Single 9.93 GiB/s Double 19.87 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

Expansion Options

PCIe	Revision: 2.0
	Max Lanes: 16
	Configuration: 1x16, 2x8, 1x8+2x4

Wireless[edit]

Wireless Communications

Cellular

4G

WiMAX		Yes

Graphics[edit]

[Edit/Modify IGP Info]

Integrated Graphics Information

GPU

HD Graphics 3000

Designer

Intel

Device ID

0x116

Execution Units

12

Max Displays

2

Frequency

650 MHz

0.65 GHz
650,000 KHz

Burst Frequency

1,300 MHz

1.3 GHz
1,300,000 KHz

Output

DP, eDP, HDMI, SDVO, CRT

Standards

DirectX	10.1
OpenGL	3.1
DP	1.1
eDP	1.1
HDMI	1.4

Additional Features

Intel Quick Sync Video

Intel InTru 3D

Intel Flexible Display Interface (FDI)

Intel Clear Video HD

[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities
Codec	Encode			Decode
Codec	Profiles	Levels	Max Resolution	Profiles	Levels	Max Resolution
MPEG-2 (H.262)	✘			Main	Main, High	Up to 80 Mbps
MPEG-4 AVC (H.264)	Main	4.1	Up to 40 Mbps	Main, High	4.1	Up to 40 Mbps
VC-1	✘			Advanced, Main, Simple	3, High, Simple	Up to 40 Mbps

Features[edit]

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AES	AES Encryption Instructions
CLMUL	Carry-less Multiplication Extension

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
EIST	Enhanced SpeedStep Technology
TXT	Trusted Execution Technology (SMX)
vPro	Intel vPro
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
Flex Memory	Flex Memory Access
FMA	Fast Memory Access (w\ GMCH)
MWT	My WiFi Technology
ATT	Anti-Theft Technology
IPT	Identity Protection Technology

@@ Line 1: / Line 1: @@
 {{intel title|Core i5-2540M}}
-{{mpu
+{{chip
 |name=Core i5-2540M
 |no image=Yes
@@ Line 101: / Line 101: @@
 |pcie config 3=1x8+2x4
 }}
+}}
+== Wireless ==
+{{wireless links
+|4g=yes
+|wimax=yes
 }}
@@ Line 138: / Line 144: @@
 == Features ==
-{{x86 features}}
+{{x86 features
+|real=Yes
+|protected=Yes
+|smm=Yes
+|fpu=Yes
+|x8616=Yes
+|x8632=Yes
+|x8664=Yes
+|nx=Yes
+|mmx=Yes
+|emmx=Yes
+|sse=Yes
+|sse2=Yes
+|sse3=Yes
+|ssse3=Yes
+|sse41=Yes
+|sse42=Yes
+|sse4a=No
+|avx=Yes
+|avx2=No
+|avx512f=No
+|avx512cd=No
+|avx512er=No
+|avx512pf=No
+|avx512bw=No
+|avx512dq=No
+|avx512vl=No
+|avx512ifma=No
+|avx512vbmi=No
+|avx5124fmaps=No
+|avx5124vnniw=No
+|avx512vpopcntdq=No
+|abm=No
+|tbm=No
+|bmi1=No
+|bmi2=No
+|fma3=No
+|fma4=No
+|aes=Yes
+|rdrand=No
+|sha=No
+|xop=No
+|adx=No
+|clmul=Yes
+|f16c=No
+|tbt1=No
+|tbt2=No
+|tbmt3=No
+|bpt=No
+|eist=Yes
+|sst=No
+|flex=Yes
+|fastmem=Yes
+|ivmd=No
+|intelnodecontroller=No
+|intelnode=No
+|kpt=No
+|ptt=No
+|intelrunsure=No
+|mbe=No
+|isrt=No
+|sba=No
+|mwt=Yes
+|sipp=No
+|att=Yes
+|ipt=Yes
+|tsx=No
+|txt=Yes
+|ht=Yes
+|vpro=Yes
+|vtx=Yes
+|vtd=Yes
+|ept=Yes
+|mpx=No
+|sgx=No
+|securekey=No
+|osguard=No
+|intqat=No
+|3dnow=No
+|e3dnow=No
+|smartmp=No
+|powernow=No
+|amdvi=No
+|amdv=No
+|amdsme=No
+|amdtsme=No
+|amdsev=No
+|rvi=No
+|smt=No
+|sensemi=No
+|xfr=No
+}}

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i5-2540M - Intel#package + and Core i5-2540M - Intel#pcie +
base frequency	2,600 MHz (2.6 GHz, 2,600,000 kHz) +
bus links	4 +
bus rate	5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus type	DMI 2.0 +
chipset	Cougar Point +
clock multiplier	26 +
core count	2 +
core family	6 +
core model	42 +
core name	Sandy Bridge M +
core stepping	J1 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.3 V (3 dV, 30 cV, 300 mV) +
cpuid	0x206A7 +
designer	Intel +
device id	0x116 +
die area	149 mm² (0.231 in², 1.49 cm², 149,000,000 µm²) +
family	Core i5 +
first announced	February 2011 +
first launched	February 2011 +
full page name	intel/core i5/i5-2540m +
has 4g support	true +
has advanced vector extensions	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Flex Memory Access +, My WiFi Technology + and Identity Protection Technology +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel my wifi technology support	true +
has intel trusted execution technology	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has wimax support	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 3000 +
integrated gpu base frequency	650 MHz (0.65 GHz, 650,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	1,300 MHz (1.3 GHz, 1,300,000 KHz) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	8-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description	12-way set associative +
l3$ size	3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
ldate	February 2011 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth	19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels	2 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Sandy Bridge +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i5-2540M +
name	Core i5-2540M +
package	FCBGA-1023 + and rPGA988B +
part number	FF8062700839209 + and AV8062700839411 +
platform	Sandy Bridge M +
power dissipation (idle)	3.1 W (3,100 mW, 0.00416 hp, 0.0031 kW) +
process	32 nm (0.032 μm, 3.2e-5 mm) +
release price	$ 266.00 (€ 239.40, £ 215.46, ¥ 27,485.78) +
s-spec	SR044 + and SR046 +
series	i5-2000 +
smp max ways	1 +
socket	Socket G2 +
supported memory type	DDR3-1333 + and DDR3-1066 +
tdp	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	4 +
transistor count	624,000,000 +
turbo frequency (1 core)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (2 cores)	3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas

Samsung

Latest revision as of 15:19, 13 December 2017

Contents

Cache[edit]

Memory controller[edit]

Expansions[edit]

Wireless[edit]

Graphics[edit]

Features[edit]