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Difference between revisions of "amd/k6-iii+/amd-k6-iii+-500acz"
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{{amd title|AMD-K6-III+/500ACZ}}
 
{{amd title|AMD-K6-III+/500ACZ}}
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{{mpu
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{{chip
 
| name                = AMD-K6-III+/500ACZ
 
| name                = AMD-K6-III+/500ACZ
 
| no image            = Yes
 
| no image            = Yes
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| model number        = AMD-K6-III+/500ACZ
 
| model number        = AMD-K6-III+/500ACZ
 
| part number        = AMD-K6-III+/500ACZ
 
| part number        = AMD-K6-III+/500ACZ
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| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = April 18, 2000
 
| first announced    = April 18, 2000
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
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| max memory          = 4 GB
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| max memory          = 4 GiB
 +
 
  
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| electrical          = Yes
 
 
| power              = 16 W
 
| power              = 16 W
 
| v core              = 2.0 V
 
| v core              = 2.0 V
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| socket 0 2 type    = PGA-321
 
| socket 0 2 type    = PGA-321
 
}}
 
}}
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'''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] desktop microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W and a typical rating of 12.6 W.
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'''AMD-K6-III+/500ACZ''' is a {{arch|32}} [[x86]] mobile microprocessor designed by [[AMD]] and introduced in early [[2000]]. This MPU which was manufactured on a [[0.18 µm process]], based on {{amd|microarchitectures/k6-iii|K6-III microarchitecture}}, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W and a typical rating of 12.6 W.
  
 
== Cache ==
 
== Cache ==
 
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
 
{{main|amd/microarchitectures/k6-iii#Memory_Hierarchy|l1=K6-III § Cache}}
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[[L3$]] can be 512 KB to 2 MB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
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[[L3$]] can be 512 KiB to 2 MiB, depending on manufacturer and [[motherboard]] model. L3$ is off-chip.
 
{{cache info
 
{{cache info
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|l1i cache=32 KB
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|l1i cache=32 KiB
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|l1i break=1x32 KB
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|l1i break=1x32 KiB
 
|l1i desc=2-way set associative
 
|l1i desc=2-way set associative
 
|l1i extra=
 
|l1i extra=
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|l1d cache=32 KB
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|l1d cache=32 KiB
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|l1d break=1x32 KB
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|l1d break=1x32 KiB
 
|l1d desc=2-way set associative
 
|l1d desc=2-way set associative
 
|l1d extra=
 
|l1d extra=
−
|l2 cache=256 KB
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|l2 cache=256 KiB
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|l2 break=1x256
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|l2 break=1x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
 
|l2 extra=(shared)
 
|l2 extra=(shared)
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== Graphics ==
 
== Graphics ==
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This SoC has no integrated graphics processing unit.
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This processors has no integrated graphics processing unit.
  
 
== Features ==
 
== Features ==
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{{mpu features
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{{x86 features
 
| mmx        = Yes
 
| mmx        = Yes
 
| emmx        = Yes
 
| emmx        = Yes

Latest revision as of 15:09, 13 December 2017

Edit Values
AMD-K6-III+/500ACZ
General Info
DesignerAMD
ManufacturerAMD
Model NumberAMD-K6-III+/500ACZ
Part NumberAMD-K6-III+/500ACZ
MarketMobile
IntroductionApril 18, 2000 (announced)
April 18, 2000 (launched)
ShopAmazon
General Specs
FamilyK6-III+
SeriesK6-III+ Mobile
Frequency499.99 MHz
Bus typeFSB
Bus speed99.99 MHz
Bus rate99.99 MT/s
Clock multiplier5
CPUID5D0
Microarchitecture
MicroarchitectureK6-III
PlatformSuper 7
Core Family5
Core Model13
Core Stepping0, 1, 2, 3
Process0.18 µm
Transistors21,400,000
TechnologyCMOS
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation16 W
Vcore2.0 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 85 °C
Tstorage-65 °C – 150 °C

AMD-K6-III+/500ACZ is a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 2000. This MPU which was manufactured on a 0.18 µm process, based on K6-III microarchitecture, operated at 500 MHz with a bus of 100 MHz and a multiplier of 5 with a maximum power dissipation rating of 16 W and a typical rating of 12.6 W.

Cache[edit]

Main article: K6-III § Cache

L3$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L3$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L2$ 256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
1x256 KiB 4-way set associative (shared)

Graphics[edit]

This processors has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
3DNow!3DNow! Extension
E3DNow!Extended 3DNow! Extension
  • Auto-power down state
  • Stop clock state
  • Halt state
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