Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am286/n80c286-10"
m (Bot: Automated text replacement (-\| electrical += Yes +)) |
m (Bot: switching template from {{mpu}} to a more generic {{chip}}) |
||
| (One intermediate revision by the same user not shown) | |||
| Line 1: | Line 1: | ||
{{amd title|N80C286-10}} | {{amd title|N80C286-10}} | ||
| − | {{ | + | {{chip |
| name = N80C286-10 | | name = N80C286-10 | ||
| no image = Yes | | no image = Yes | ||
| Line 10: | Line 10: | ||
| model number = N80C286-10 | | model number = N80C286-10 | ||
| part number = | | part number = | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Embedded | | market = Embedded | ||
| first announced = | | first announced = | ||
Latest revision as of 15:18, 13 December 2017
| Edit Values | |
| N80C286-10 | |
| General Info | |
| Designer | Intel |
| Manufacturer | AMD |
| Model Number | N80C286-10 |
| Market | Embedded |
| Introduction | 1990 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Am286 |
| Series | N80C286 |
| Locked | No |
| Frequency | 10 MHz |
| Bus type | FSB |
| Bus speed | 10 MHz |
| Bus rate | 10 MT/s |
| Clock multiplier | 1 |
| Microarchitecture | |
| Microarchitecture | 80286 |
| Process | 800 nm |
| Technology | CMOS |
| Word Size | 16 bit |
| Cores | 1 |
| Max Memory | 16 MiB |
| Max Address Mem | 0xFFFFFF |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| Power dissipation | 1 W |
| Vcore | 5 V ± 10% |
| Tjunction | 0 °C – 165 °C |
| Tcase | 0 °C – 100 °C |
N80C286-10 was a member of AMD's Am286 family specifically designed for embedded applications, likely battery-powered. These chips were remade by AMD in static CMOS design (as opposed to nMOS), resulting in considerably lower power dissipation. This MPU was rated to operate at 10 MHz and was packaged in a 68-pin Plastic Leadless Chip Carrier package.
Cache[edit]
- Main article: 80286 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- Protected mode
- Supports FPU coprocessor (Am287)