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Difference between revisions of "amd/am186/n80c186-16"
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{{amd title|N80C186-16}} | {{amd title|N80C186-16}} | ||
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| name = N80C186-16 | | name = N80C186-16 | ||
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| model number = N80C186-16 | | model number = N80C186-16 | ||
| part number = N80C186-16 | | part number = N80C186-16 | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
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| market = Embedded | | market = Embedded | ||
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| core count = 1 | | core count = 1 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 1 | + | | max memory = 1 MiB |
| max memory addr = | | max memory addr = | ||
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| power = 1 W | | power = 1 W | ||
| v core = 5 V | | v core = 5 V | ||
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{{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | {{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=0 | + | |l1 cache=0 KiB |
− | |l1 break=1x0 | + | |l1 break=1x0 KiB |
|l1 desc= | |l1 desc= | ||
|l1 extra= | |l1 extra= | ||
− | |l2 cache=0 | + | |l2 cache=0 KiB |
− | |l2 break=1x0 | + | |l2 break=1x0 KiB |
}} | }} | ||
Latest revision as of 15:17, 13 December 2017
Edit Values | |
N80C186-16 | |
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General Info | |
Manufacturer | AMD |
Model Number | N80C186-16 |
Part Number | N80C186-16 |
Market | Embedded |
General Specs | |
Family | Am186 |
Series | Am186 |
Frequency | 16 MHz |
Bus speed | 4 MHz |
Bus rate | 4 MT/s |
Microarchitecture | |
Microarchitecture | 80186 |
Core Name | 80186 |
Technology | CMOS |
Word Size | 16 bit |
Cores | 1 |
Max Memory | 1 MiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Power dissipation | 1 W |
Vcore | 5 V ± 10 % |
Tcase | 0 °C – 70 °C |
Tstorage | -65 °C – 150 °C |
N80C186-16 is an 80186-based microprocessor manufactured by AMD. This model is a redesigned CMOS version that operated at 16 MHz and introduced a number of enhancements in addition to being lower-power CMOS, including a DRAM Refresh Control Unit and various power saving modes.
Contents
Cache[edit]
- Main article: 80186 § Cache
Cache Info [Edit Values] | ||
L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics[edit]
This chip had no integrated graphics processing unit.
Features[edit]
- 10 new instructions
- Two DMA channels
- Three programmable interrupt timers
- Local Bus Controller
- Object code-compatible with all 86/88 software
- Power saving mode
- DRAM Refresh Control Unit
Documents[edit]
- AMD 80C186 (June 1994), Publication #17907 Rev B