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Difference between revisions of "intel/xeon platinum/8156"
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|SPECrate2017_fp_base=71.0 | |SPECrate2017_fp_base=71.0 | ||
|SPECrate2017_fp_peak=73.0 | |SPECrate2017_fp_peak=73.0 | ||
+ | }} | ||
+ | {{benchmark entry | ||
+ | |type=spec | ||
+ | |test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171030-00240.html | ||
+ | |test_timestamp=2017-10-17 04:04:54-0400 | ||
+ | |chip_count=4 | ||
+ | |core_count=16 | ||
+ | |copies_count=32 | ||
+ | |vendor=Dell Inc. | ||
+ | |system=PowerEdge R940 (Intel Xeon Platinum 8156, 3.60 GHz) | ||
+ | |SPECrate2017_fp_base=139 | ||
+ | |SPECrate2017_fp_peak=141 | ||
}} | }} | ||
}} | }} | ||
[[Category:microprocessor models by intel based on skylake extreme core count die]] | [[Category:microprocessor models by intel based on skylake extreme core count die]] |
Revision as of 01:55, 24 November 2017
Template:mpu Xeon Platinum 8156 is a 64-bit quad-core x86 multi-socket highest performance server microprocessor introduced by Intel in mid-2017. This chip supports up to 8-way multiprocessing. The Platinum 8156, which is based on the server configuration of the Skylake microarchitecture and is manufactured on a 14 nm+ process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 3.6 GHz with a TDP of 105 W and a turbo boost frequency of up to 3.7 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
Cache
- Main article: Skylake § Cache
The Xeon Platinum 8156 features a considerably larger non-default 16.5 MiB of L3, a size that would normally be found on a 12-core part.
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Frequencies
- See also: Intel's CPU Frequency Behavior
Mode | Base | Turbo Frequency/Active Cores | |||
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1 | 2 | 3 | 4 | ||
Normal | 3,600 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz | 3,700 MHz |
AVX2 | 3,300 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz | 3,600 MHz |
AVX512 | 2,700 MHz | 3,500 MHz | 3,500 MHz | 3,300 MHz | 3,300 MHz |
Benchmarks
Facts about "Xeon Platinum 8156 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 8156 - Intel#io + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
max memory bandwidth | 119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) + |
max memory channels | 6 + |
max pcie lanes | 48 + |
supported memory type | DDR4-2666 + |