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(→‎Cache)
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== Cache ==
 
== Cache ==
 +
{{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}
 +
{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=512 KiB
 +
|l2 break=2x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=write-back
 +
|l3 cache=4 MiB
 +
|l3 break=2x2 MiB
 +
|l3 desc=16-way set associative
 +
|l3 policy=write-back
 +
}}
  
 
== Memory controller ==
 
== Memory controller ==

Revision as of 20:07, 2 September 2017

Template:mpu

Cache

Main article: Sandy Bridge § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back

Memory controller

Expansions

Graphics

Features

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i7/i7-2649m&oldid=63051"
Facts about "Core i7-2649M - Intel"
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"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i7-2649M - Intel#package + and Core i7-2649M - Intel#pcie +
base frequency2,300 MHz (2.3 GHz, 2,300,000 kHz) +
bus links4 +
bus rate5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus typeDMI 2.0 +
chipsetCougar Point +
clock multiplier23 +
core count2 +
core family6 +
core model42 +
core nameSandy Bridge M +
core steppingJ1 +
core voltage (max)1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)0.3 V (3 dV, 30 cV, 300 mV) +
cpuid0x206A7 +
designerIntel +
device id0x116 +
die area149 mm² (0.231 in², 1.49 cm², 149,000,000 µm²) +
familyCore i7 +
first announcedFebruary 2011 +
first launchedFebruary 2011 +
full page nameintel/core i7/i7-2649m +
has 4g supporttrue +
has advanced vector extensionstrue +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Flex Memory Access +, My WiFi Technology + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has intel identity protection technology supporttrue +
has intel my wifi technology supporttrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has wimax supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 3000 +
integrated gpu base frequency500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency1,100 MHz (1.1 GHz, 1,100,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description16-way set associative +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
ldateFebruary 2011 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels2 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureSandy Bridge +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi7-2649M +
nameCore i7-2649M +
packageFCBGA-1023 +
part numberAV8062700850010S +
platformSandy Bridge M +
power dissipation (idle)2.5 W (2,500 mW, 0.00335 hp, 0.0025 kW) +
process32 nm (0.032 μm, 3.2e-5 mm) +
release price$ 346.00 (€ 311.40, £ 280.26, ¥ 35,752.18) +
s-specSR04N +
seriesi7-2000 +
smp max ways1 +
supported memory typeDDR3-1333 + and DDR3-1066 +
tdp25 W (25,000 mW, 0.0335 hp, 0.025 kW) +
technologyCMOS +
thread count4 +
transistor count624,000,000 +
turbo frequency (1 core)3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (2 cores)2,900 MHz (2.9 GHz, 2,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +