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Difference between revisions of "intel/core i7/i7-8550u"
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− | {{expansions | + | {{expansions main |
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− | | pcie lanes | + | {{expansions entry |
− | | pcie config | + | |type=PCIe |
− | | pcie config 2 | + | |pcie revision=3.0 |
− | | pcie config 3 | + | |pcie lanes=12 |
− | | pcie config 4 | + | |pcie config=1x4 |
+ | |pcie config 2=2x2 | ||
+ | |pcie config 3=1x2+2x1 | ||
+ | |pcie config 4=4x1 | ||
+ | }} | ||
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Revision as of 04:21, 21 August 2017
Template:mpu Core i7-8550U is a 64-bit quad-core performance x86 mobile microprocessor introduced by Intel in mid-2017. This processor, which is based on an enhanced version of the Kaby Lake microarchitecture, is manufactured on Intel's 2nd generation enhanced 14nm+ process. The i7-8550U operates at 1.8 GHz with a TDP of 15 W and Turbo Boost frequency of up to 4 GHz. This MPU supports up to 32 GiB of dual-channel DDR4-2400 memory.
Cache
- Main article: Kaby Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Graphics
This section is empty; you can help add the missing info by editing this page. |
Features
[Edit/Modify Supported Features]
Facts about "Core i7-8550U - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-8550U - Intel#pcie + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard +, Flex Memory Access +, Smart Response Technology + and My WiFi Technology + |
has intel enhanced speedstep technology | true + |
has intel flex memory access support | true + |
has intel my wifi technology support | true + |
has intel secure key technology | true + |
has intel smart response technology support | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
max memory bandwidth | 35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR4-2400 + and LPDDR3-2133 + |
x86/has memory protection extensions | true + |
x86/has software guard extensions | true + |