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Difference between revisions of "intel/celeron/887"
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− | '''Celeron 887''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in late [[2012]]. The Celeron 887, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.5 GHz with a [[TDP]] of 17 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a bust frequency of 1 GHz. | + | '''Celeron 887''' is a [[dual-core]] budget mobile [[x86]] microprocessor introduced by [[Intel]] in late [[2012]]. The Celeron 887, which is based on the {{intel|Sandy Bridge|l=arch}} microarchitecture and is manufactured on a [[32 nm process]], operates at 1.5 GHz with a [[TDP]] of 17 W. This chip incorporates Intel's {{intel|HD Graphics (Sandy Bridge)|HD Graphics}} [[integrated graphics]] operating at 350 MHz with a bust frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory. |
== Cache == | == Cache == |
Revision as of 04:12, 20 August 2017
Template:mpu Celeron 887 is a dual-core budget mobile x86 microprocessor introduced by Intel in late 2012. The Celeron 887, which is based on the Sandy Bridge microarchitecture and is manufactured on a 32 nm process, operates at 1.5 GHz with a TDP of 17 W. This chip incorporates Intel's HD Graphics integrated graphics operating at 350 MHz with a bust frequency of 1 GHz. This processor supports 16 GiB of dual-channel DDR3-1333 memory.
Cache
- Main article: Sandy Bridge § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Graphics
Integrated Graphics Information
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[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities | |||||||
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Codec | Encode | Decode | |||||
Profiles | Levels | Max Resolution | Profiles | Levels | Max Resolution | ||
MPEG-2 (H.262) | ✘ | Main | Main, High | Up to 80 Mbps | |||
MPEG-4 AVC (H.264) | Main | 4.1 | Up to 40 Mbps | Main, High | 4.1 | Up to 40 Mbps | |
VC-1 | ✘ | Advanced, Main, Simple | 3, High, Simple | Up to 40 Mbps |
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Celeron 887 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron 887 - Intel#pcie + |
device id | 0x0106 + |
has ecc memory support | false + |
integrated gpu | HD Graphics (Sandy Bridge) + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 6 + |
integrated gpu max frequency | 1,000 MHz (1 GHz, 1,000,000 KHz) + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | 8-way set associative + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |