Semiconductor & Computer Engineering
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Difference between revisions of "Template:x86 features"
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-->{{#if: {{istrue|{{{sse42|}}}}} | <tr><th style="width: 100px;">SSE4.2</th><td>{{x86|SSE4.2|Streaming SIMD Extensions 4.2}}</td></tr> }}<!-- | -->{{#if: {{istrue|{{{sse42|}}}}} | <tr><th style="width: 100px;">SSE4.2</th><td>{{x86|SSE4.2|Streaming SIMD Extensions 4.2}}</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{sse4a|}}}}} | <tr><th style="width: 100px;">SSE4a</th><td>{{x86|SSE4a|Streaming SIMD Extensions 4a}}</td></tr> }}<!-- | -->{{#if: {{istrue|{{{sse4a|}}}}} | <tr><th style="width: 100px;">SSE4a</th><td>{{x86|SSE4a|Streaming SIMD Extensions 4a}}</td></tr> }}<!-- | ||
| − | -->{{#if: {{istrue|{{{avx|}}}}} | <tr><th style="width: 100px;">AVX</th><td>Advanced Vector Extensions</td></tr>[[has feature::Advanced Vector Extensions| ]][[has advanced vector extensions::true| ]] }}<!-- | + | -->{{#if: {{istrue|{{{avx|}}}}} | <tr><th style="width: 100px;">AVX</th><td>{{x86|AVX|Advanced Vector Extensions}}</td></tr>[[has feature::Advanced Vector Extensions| ]][[has advanced vector extensions::true| ]] }}<!-- |
| − | -->{{#if: {{istrue|{{{avx2|}}}}} | <tr><th style="width: 100px;">AVX2</th><td>Advanced Vector Extensions 2</td></tr>[[has feature::Advanced Vector Extensions 2| ]][[has advanced vector extensions 2::true| ]] }}<!-- | + | -->{{#if: {{istrue|{{{avx2|}}}}} | <tr><th style="width: 100px;">AVX2</th><td>{{x86|AVX2|Advanced Vector Extensions 2}}</td></tr>[[has feature::Advanced Vector Extensions 2| ]][[has advanced vector extensions 2::true| ]] }}<!-- |
-->{{#if: {{istrue|{{{avx512f|{{{avx512cd|{{{avx512er|{{{avx512pf|{{{avx512bw|{{{avx512dq|{{{avx512vl|{{{avx512ifma|{{{avx512vbmi|{{{avx5124fmaps|{{{avx5124vnniw|{{{avx512vpopcntdq|}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}} | <tr><th style="width: 100px;">AVX-512</th><td>{{x86|avx-512|Advanced Vector 512-bit}}</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512f|{{{avx512cd|{{{avx512er|{{{avx512pf|{{{avx512bw|{{{avx512dq|{{{avx512vl|{{{avx512ifma|{{{avx512vbmi|{{{avx5124fmaps|{{{avx5124vnniw|{{{avx512vpopcntdq|}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}}} | <tr><th style="width: 100px;">AVX-512</th><td>{{x86|avx-512|Advanced Vector 512-bit}}</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx512f|}}}}} | <tr><th style="width: 100px;">AVX512F</th><td>AVX-512 Foundation</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512f|}}}}} | <tr><th style="width: 100px;">AVX512F</th><td>AVX-512 Foundation</td></tr> }}<!-- | ||
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-->{{#if: {{istrue|{{{avx5124vnniw|}}}}} | <tr><th style="width: 100px;">AVX5124VNNIW</th><td>AVX-512 Vector Neural Network Instructions Word Variable Precision</td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx5124vnniw|}}}}} | <tr><th style="width: 100px;">AVX5124VNNIW</th><td>AVX-512 Vector Neural Network Instructions Word Variable Precision</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{avx512vpopcntdq|}}}}} | <tr><th style="width: 100px;">AVX512VPOPCNTDQ</th><td>AVX-512 Vector Population Count Doubleword and Quadword </td></tr> }}<!-- | -->{{#if: {{istrue|{{{avx512vpopcntdq|}}}}} | <tr><th style="width: 100px;">AVX512VPOPCNTDQ</th><td>AVX-512 Vector Population Count Doubleword and Quadword </td></tr> }}<!-- | ||
| − | -->{{#if: {{istrue|{{{abm|}}}}} | <tr><th style="width: 100px;">ABM</th><td>Advanced Bit Manipulation</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{abm|}}}}} | <tr><th style="width: 100px;">ABM</th><td>{{x86|ABM|Advanced Bit Manipulation}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{tbm|}}}}} | <tr><th style="width: 100px;">TBM</th><td>Trailing Bit Manipulation</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{tbm|}}}}} | <tr><th style="width: 100px;">TBM</th><td>{{x86|TBM|Trailing Bit Manipulation}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{bmi1|}}}}} | <tr><th style="width: 100px;">BMI1</th><td>Bit Manipulation Instruction Set 1</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{bmi1|}}}}} | <tr><th style="width: 100px;">BMI1</th><td>{{x86|BMI1|Bit Manipulation Instruction Set 1}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{bmi2|}}}}} | <tr><th style="width: 100px;">BMI2</th><td>Bit Manipulation Instruction Set 2</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{bmi2|}}}}} | <tr><th style="width: 100px;">BMI2</th><td>{{x86|BMI2|Bit Manipulation Instruction Set 2}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fma3|}}}}} | <tr><th style="width: 100px;">FMA3</th><td>3-Operand Fused-Multiply-Add</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{fma3|}}}}} | <tr><th style="width: 100px;">FMA3</th><td>{{x86|FMA3|3-Operand Fused-Multiply-Add}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fma4|}}}}} | <tr><th style="width: 100px;">FMA4</th><td>4-Operand Fused-Multiply-Add</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{fma4|}}}}} | <tr><th style="width: 100px;">FMA4</th><td>{{x86|FMA4|4-Operand Fused-Multiply-Add}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{aes|}}}}} | <tr><th style="width: 100px;">AES</th><td>AES Encryption Instructions[[has feature::Advanced Encryption Standard Instruction Set Extension| ]][[has x86 advanced encryption standard instruction set extension::true| ]]</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{aes|}}}}} | <tr><th style="width: 100px;">AES</th><td>{{x86|AES|AES Encryption Instructions}}[[has feature::Advanced Encryption Standard Instruction Set Extension| ]][[has x86 advanced encryption standard instruction set extension::true| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{rdrand|}}}}} | <tr><th style="width: 100px;">RdRand</th><td>Hardware RNG</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{rdrand|}}}}} | <tr><th style="width: 100px;">RdRand</th><td>{{x86|RdRand|Hardware RNG}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sha|}}}}} | <tr><th style="width: 100px;">SHA</th><td>SHA Extensions</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{sha|}}}}} | <tr><th style="width: 100px;">SHA</th><td>{{x86|SHA|SHA Extensions}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{xop|}}}}} | <tr><th style="width: 100px;">XOP</th><td>eXtended Operations Extension</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{xop|}}}}} | <tr><th style="width: 100px;">XOP</th><td>{{x86|XOP|eXtended Operations Extension}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{adx|}}}}} | <tr><th style="width: 100px;">ADX</th><td>Multi-Precision Add-Carry</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{adx|}}}}} | <tr><th style="width: 100px;">ADX</th><td>{{x86|ADX|Multi-Precision Add-Carry}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{clmul|}}}}} | <tr><th style="width: 100px;">CLMUL</th><td>Carry-less Multiplication Extension</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{clmul|}}}}} | <tr><th style="width: 100px;">CLMUL</th><td>{{x86|CLMUL|Carry-less Multiplication Extension}}</td></tr> }}<!-- |
-->{{#if: {{istrue|{{{f16c|}}}}} | <tr><th style="width: 100px;">F16C</th><td>16-bit Floating Point Conversion</td></tr> }}<!-- | -->{{#if: {{istrue|{{{f16c|}}}}} | <tr><th style="width: 100px;">F16C</th><td>16-bit Floating Point Conversion</td></tr> }}<!-- | ||
--></table> | --></table> | ||
<table class="tl1" style="font-size: 0.9em; float: left; margin-right: 10px;"><!-- | <table class="tl1" style="font-size: 0.9em; float: left; margin-right: 10px;"><!-- | ||
| − | -->{{#if: {{istrue|{{{x8616|}}}}} | <tr><th style="width: 100px;">x86-16</th><td>16-bit x86</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{x8616|}}}}} | <tr><th style="width: 100px;">x86-16</th><td>{{x86|x86-16|16-bit x86}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{x8632|}}}}} | <tr><th style="width: 100px;">x86-32</th><td>32-bit x86</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{x8632|}}}}} | <tr><th style="width: 100px;">x86-32</th><td>{{x86|x86-32|32-bit x86}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{x8664|}}}}} | <tr><th style="width: 100px;">x86-64</th><td>64-bit x86</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{x8664|}}}}} | <tr><th style="width: 100px;">x86-64</th><td>{{x86|x86-64|64-bit x86}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{real|}}}}} | <tr><th style="width: 100px;">Real</th><td>Real Mode</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{real|}}}}} | <tr><th style="width: 100px;">Real</th><td>{{x86|Real Mode}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{protected|}}}}} | <tr><th style="width: 100px;">Protected</th><td>Protected Mode</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{protected|}}}}} | <tr><th style="width: 100px;">Protected</th><td>{{x86|Protected Mode}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{smm|}}}}} | <tr><th style="width: 100px;">SMM</th><td>System Management Mode</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{smm|}}}}} | <tr><th style="width: 100px;">SMM</th><td>{{x86|System Management Mode}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{fpu|}}}}} | <tr><th style="width: 100px;">FPU</th><td>Integrated x87 FPU</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{fpu|}}}}} | <tr><th style="width: 100px;">FPU</th><td>{{x86|x87|Integrated x87 FPU}}</td></tr> }}<!-- |
-->{{#if: {{istrue|{{{powernow|}}}}} | <tr><th style="width: 100px;">PowerNow!</th><td>PowerNow[[has feature::PowerNow!| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{powernow|}}}}} | <tr><th style="width: 100px;">PowerNow!</th><td>PowerNow[[has feature::PowerNow!| ]]</td></tr> }}<!-- | ||
| − | -->{{#if: {{istrue|{{{nx|}}}}} | <tr><th style="width: 100px;">NX</th><td>No-eXecute</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{nx|}}}}} | <tr><th style="width: 100px;">NX</th><td>{{x86|No-eXecute}}</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{ht|}}}}} | <tr><th style="width: 100px;">HT</th><td>Hyper-Threading[[has simultaneous multithreading::true| ]][[has feature::Hyper-Threading Technology| ]]</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{ht|}}}}} | <tr><th style="width: 100px;">HT</th><td>{{intel|Hyper-Threading}}[[has simultaneous multithreading::true| ]][[has feature::Hyper-Threading Technology| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{smt|}}}}} | <tr><th style="width: 100px;">SMT</th><td>Simultaneous Multithreading[[has simultaneous multithreading::true| ]]</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{smt|}}}}} | <tr><th style="width: 100px;">SMT</th><td>[[Simultaneous Multithreading]][[has simultaneous multithreading::true| ]]</td></tr> }}<!-- |
-->{{#if: {{istrue|{{{tbt1|}}}}} | <tr><th style="width: 100px;">TBT 1.0</th><td>{{intel|Turbo Boost Technology}} 1.0 [[has feature::Turbo Boost Technology 1.0| ]][[has intel turbo boost technology 1_0::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{tbt1|}}}}} | <tr><th style="width: 100px;">TBT 1.0</th><td>{{intel|Turbo Boost Technology}} 1.0 [[has feature::Turbo Boost Technology 1.0| ]][[has intel turbo boost technology 1_0::true| ]]</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{tbt2|}}}}} | <tr><th style="width: 100px;">TBT 2.0</th><td>{{intel|Turbo Boost Technology}} 2.0[[has feature::Turbo Boost Technology 2.0| ]][[has intel turbo boost technology 2_0::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{tbt2|}}}}} | <tr><th style="width: 100px;">TBT 2.0</th><td>{{intel|Turbo Boost Technology}} 2.0[[has feature::Turbo Boost Technology 2.0| ]][[has intel turbo boost technology 2_0::true| ]]</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{tbmt3|}}}}} | <tr><th style="width: 100px;">TBMT 3.0</th><td>Turbo Boost Max Technology 3.0[[has feature::Turbo Boost Max Technology 3.0| ]][[has intel turbo boost max technology 3_0::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{tbmt3|}}}}} | <tr><th style="width: 100px;">TBMT 3.0</th><td>Turbo Boost Max Technology 3.0[[has feature::Turbo Boost Max Technology 3.0| ]][[has intel turbo boost max technology 3_0::true| ]]</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{bpt|}}}}} | <tr><th style="width: 100px;">BPT</th><td>Burst Performance Technology[[has feature::Burst Performance Technology| ]][[has intel burst performance technology::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{bpt|}}}}} | <tr><th style="width: 100px;">BPT</th><td>Burst Performance Technology[[has feature::Burst Performance Technology| ]][[has intel burst performance technology::true| ]]</td></tr> }}<!-- | ||
| − | -->{{#if: {{istrue|{{{eist|}}}}} | <tr><th style="width: 100px;">EIST</th><td>Enhanced SpeedStep Technology[[has intel enhanced speedstep technology::true| ]][[has feature::Enhanced SpeedStep Technology| ]]</td></tr> }}<!-- | + | -->{{#if: {{istrue|{{{eist|}}}}} | <tr><th style="width: 100px;">EIST</th><td>{{intel|Enhanced SpeedStep Technology}}[[has intel enhanced speedstep technology::true| ]][[has feature::Enhanced SpeedStep Technology| ]]</td></tr> }}<!-- |
| − | -->{{#if: {{istrue|{{{sst|}}}}} | <tr><th style="width: 100px;">SST</th><td>Speed Shift Technology</td></tr>[[has feature::Speed Shift Technology| ]][[has intel speed shift technology::true| ]] }}<!-- | + | -->{{#if: {{istrue|{{{sst|}}}}} | <tr><th style="width: 100px;">SST</th><td>{{intel|Speed Shift Technology}}</td></tr>[[has feature::Speed Shift Technology| ]][[has intel speed shift technology::true| ]] }}<!-- |
-->{{#if: {{istrue|{{{txt|}}}}} | <tr><th style="width: 100px;">TXT</th><td>Trusted Execution Technology (SMX)[[has feature::Trusted Execution Technology| ]][[has intel trusted execution technology::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{txt|}}}}} | <tr><th style="width: 100px;">TXT</th><td>Trusted Execution Technology (SMX)[[has feature::Trusted Execution Technology| ]][[has intel trusted execution technology::true| ]]</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{vpro|}}}}} | <tr><th style="width: 100px;">vPro</th><td>Intel vPro[[has intel vpro technology::true| ]][[has feature::Intel vPro Technology| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{vpro|}}}}} | <tr><th style="width: 100px;">vPro</th><td>Intel vPro[[has intel vpro technology::true| ]][[has feature::Intel vPro Technology| ]]</td></tr> }}<!-- | ||
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-->{{#if: {{istrue|{{{smartmp|}}}}} | <tr><th style="width: 100px;">SmartMP</th><td>SmartMP Technology[[has feature::SmartMP Technology| ]][[has amd smartmp technology::true| ]][[has multiprocessing support::true| ]]</td></tr> }}<!-- | -->{{#if: {{istrue|{{{smartmp|}}}}} | <tr><th style="width: 100px;">SmartMP</th><td>SmartMP Technology[[has feature::SmartMP Technology| ]][[has amd smartmp technology::true| ]][[has multiprocessing support::true| ]]</td></tr> }}<!-- | ||
-->{{#if: {{istrue|{{{sensemi|}}}}} | <tr><th style="width: 100px;">SenseMI</th><td>SenseMI Technology</td></tr>[[has feature::SenseMI Technology| ]][[has amd sensemi technology::true| ]] }}<!-- | -->{{#if: {{istrue|{{{sensemi|}}}}} | <tr><th style="width: 100px;">SenseMI</th><td>SenseMI Technology</td></tr>[[has feature::SenseMI Technology| ]][[has amd sensemi technology::true| ]] }}<!-- | ||
| − | -->{{#if: {{istrue|{{{xfr|}}}}} | <tr><th style="width: 100px;">XFR</th><td>Extended Frequency Range</td></tr>[[has feature::Extended Frequency Range| ]][[has amd extended frequency range::true| ]] }}<!-- | + | -->{{#if: {{istrue|{{{xfr|}}}}} | <tr><th style="width: 100px;">XFR</th><td>{{amd|Extended Frequency Range}}</td></tr>[[has feature::Extended Frequency Range| ]][[has amd extended frequency range::true| ]] }}<!-- |
--></table> | --></table> | ||
</td> | </td> | ||
Revision as of 22:48, 16 August 2017
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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