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Difference between revisions of "intel/atom/c3850"
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== Cache ==
 
== Cache ==
 
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
 
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}}
−
{{cache size}}
+
{{cache size
 +
|l1 cache=672 KiB
 +
|l1i cache=384 KiB
 +
|l1i break=12x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1i policy=write-back
 +
|l1d cache=288 KiB
 +
|l1d break=12x24 KiB
 +
|l1d desc=6-way set associative
 +
|l1d policy=write-back
 +
|l2 cache=12 MiB
 +
|l2 break=6x2 MiB
 +
|l2 desc=16-way set associative
 +
|l2 policy=write-back
 +
}}

Revision as of 22:13, 15 August 2017

Template:mpu Atom C3850 is a 64-bit dodeca-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3850, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 2.1 GHz with a TDP of 25 W and a turbo boost frequency of up to 2.4 GHz. The C3850 supports up to a dual-channel of 256 GiB of DDR4-2133 ECC memory.

Cache

Main article: Goldmont § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$672 KiB
688,128 B
0.656 MiB
L1I$384 KiB
393,216 B
0.375 MiB
12x32 KiB8-way set associativewrite-back
L1D$288 KiB
294,912 B
0.281 MiB
12x24 KiB6-way set associativewrite-back
L2$12 MiB
12,288 KiB
12,582,912 B
0.0117 GiB
  6x2 MiB16-way set associativewrite-back
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Facts about "Atom C3850 - Intel"
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l1$ size672 KiB (688,128 B, 0.656 MiB) +
l1d$ description6-way set associative +
l1d$ size288 KiB (294,912 B, 0.281 MiB) +
l1i$ description8-way set associative +
l1i$ size384 KiB (393,216 B, 0.375 MiB) +
l2$ description16-way set associative +
l2$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +