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Difference between revisions of "intel/cores/coffee lake s"
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{{intel title|Coffee Lake S|core}} | {{intel title|Coffee Lake S|core}} | ||
− | {{core}} | + | {{core |
+ | |name=Coffee Lake S | ||
+ | |no image=Yes | ||
+ | |developer=Intel | ||
+ | |manufacturer=Intel | ||
+ | |first announced=2H, 2017 | ||
+ | |isa=x86-64 | ||
+ | |isa family=x86 | ||
+ | |microarch=Coffee Lake | ||
+ | |word=64 bit | ||
+ | |proc=14 nm | ||
+ | |tech=CMOS | ||
+ | |predecessor=Kaby Lake S | ||
+ | |predecessor link=intel/cores/kaby lake s | ||
+ | |successor=Tigerlake S | ||
+ | |successor link=intel/cores/tigerlake s | ||
+ | }} |
Revision as of 00:22, 29 July 2017
Edit Values | |
Coffee Lake S | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2H, 2017 (announced) |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Coffee Lake |
Word Size | 8 octets 64 bit16 nibbles |
Process | 14 nm 0.014 μm 1.4e-5 mm |
Technology | CMOS |
Succession | |
Facts about "Coffee Lake S - Cores - Intel"
designer | Intel + |
first announced | 0002 JL + |
instance of | core + |
isa | x86-64 + |
isa family | x86 + |
manufacturer | Intel + |
microarchitecture | Coffee Lake + |
name | Coffee Lake S + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |