Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/core i7/i7-7800x"
| Line 1: | Line 1: | ||
{{intel title|Core i7-7800X}} | {{intel title|Core i7-7800X}} | ||
{{mpu | {{mpu | ||
| − | | future | + | |future=Yes |
| − | | name | + | |name=Core i7-7800X |
| − | | | + | |image=skylake x (front).png |
| − | + | |designer=Intel | |
| − | + | |manufacturer=Intel | |
| − | | designer | + | |model number=i7-7800X |
| − | | manufacturer | + | |part number=BX80673I77800X |
| − | | model number | + | |market=Desktop |
| − | | part number | + | |first announced=May 30, 2017 |
| − | + | |release price=$389 | |
| − | + | |family=Core i7 | |
| − | + | |series=i7-7000 | |
| − | + | |locked=No | |
| − | + | |frequency=3,500 MHz | |
| − | + | |turbo frequency1=4,300 MHz | |
| − | | market | + | |bus type=DMI 3.0 |
| − | | first announced | + | |bus links=4 |
| − | + | |bus rate=8 GT/s | |
| − | + | |clock multiplier=35 | |
| − | + | |isa=x86-64 | |
| − | | release price | + | |isa family=x86 |
| − | + | |microarch=Skylake | |
| − | | family | + | |platform=Skylake |
| − | | series | + | |chipset=Lewisburg |
| − | | locked | + | |core name=Skylake X |
| − | | frequency | + | |process=14 nm |
| − | + | |technology=CMOS | |
| − | | turbo frequency1 | + | |word size=64 bit |
| − | + | |core count=6 | |
| − | + | |thread count=12 | |
| − | + | |max cpus=1 | |
| − | | bus type | + | |max memory=128 GiB |
| − | | bus | + | |tdp=140 W |
| − | | bus rate | + | |tstorage min=-25 °C |
| − | + | |tstorage max=125 °C | |
| − | | clock multiplier | + | |package module 1={{packages/intel/lga-2066}} |
| − | + | |turbo frequency=Yes | |
| − | |||
| − | | isa | ||
| − | | isa | ||
| − | | microarch | ||
| − | | platform | ||
| − | | chipset | ||
| − | | core name | ||
| − | |||
| − | |||
| − | |||
| − | | process | ||
| − | |||
| − | | technology | ||
| − | |||
| − | |||
| − | |||
| − | | word size | ||
| − | | core count | ||
| − | | thread count | ||
| − | | max cpus | ||
| − | | max memory | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | | tdp | ||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | |||
| − | | tstorage min | ||
| − | | tstorage max | ||
| − | |||
| − | |||
| − | |||
| − | | package module 1 | ||
}} | }} | ||
'''Core i7-7800X''' is a {{arch|64}} [[hexa-core]] high-performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]]. This chip, which is based on the {{intel|Skylake|l=arch}} microarchitecture, is fabricated on Intel's enhanced [[14 nm process|14nm+ process]]. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a {{intel|Turbo Boost}} frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory. | '''Core i7-7800X''' is a {{arch|64}} [[hexa-core]] high-performance [[x86]] desktop microprocessor introduced by [[Intel]] in mid-[[2017]]. This chip, which is based on the {{intel|Skylake|l=arch}} microarchitecture, is fabricated on Intel's enhanced [[14 nm process|14nm+ process]]. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a {{intel|Turbo Boost}} frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory. | ||
Revision as of 18:07, 5 July 2017
Template:mpu Core i7-7800X is a 64-bit hexa-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's enhanced 14nm+ process. The i7-7800X operates at 3.5 GHz with a TDP of 140 W and a Turbo Boost frequency of 4.3 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2400 memory.
 |
Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release. |
Cache
- Main article: Skylake § Cache
 |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||||||
Memory controller
 |
Integrated Memory Controller
|
|||||||||
|
||||||||||
Expansions
 |
Expansion Options
|
|||||||
|
||||||||
Graphics
This processor has no integrated graphics.
Features
[Edit/Modify Supported Features]
Facts about "Core i7-7800X - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i7-7800X - Intel#io + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | false + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions + and Software Guard Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has second level address translation support | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |
| l3$ description | 11-way set associative + |
| l3$ size | 8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) + |
| max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
| max memory channels | 4 + |
| max pcie lanes | 28 + |
| supported memory type | DDR4-2400 + |
| x86/has memory protection extensions | true + |
| x86/has software guard extensions | true + |