Semiconductor & Computer Engineering
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Difference between revisions of "amd/k6-2/k6-2e-300afr"
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| model number = K6-2E/300AFR | | model number = K6-2E/300AFR | ||
| part number = AMD-K6-2E/300AFR | | part number = AMD-K6-2E/300AFR | ||
| − | |||
| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Embedded | | market = Embedded | ||
| first announced = May, 1999 | | first announced = May, 1999 | ||
Revision as of 16:42, 30 June 2017
Template:mpu K6-2E/300AFR was a 32-bit x86 K6-2-based microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 300 MHz and had a FSB operating at 100 MHz.
Contents
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 2 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
| L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
- Auto-power down state
- Stop clock state
Documents
DataSheet
- AMD-K6-2E Processor Data Sheet; Publication #22529 Revision B/0, January 2000
Facts about "K6-2E/300AFR - AMD"
| l1d$ description | 2-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |