Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am486/am486sx2-50"
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| model number = Am486SX2-50 | | model number = Am486SX2-50 | ||
| part number = A80486SX2-50 | | part number = A80486SX2-50 | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
| + | | part number 4 = | ||
| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
Revision as of 16:15, 30 June 2017
Template:mpu Am486SX2-50 was an 80486-compatible microprocessor introduced by AMD in early 1994. This processor has a clock multiplier of 2 with a core frequency of 50 MHz and a bus frequency of 25 MHz. As with the rest of the 486SX series, this MPU does not have a functional FPU on-die.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486SX2-50 - AMD"
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |